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Wed, 9 Oct 2024 20:43:03 +0800 (CST) Received: from P_UKIT01-A7bmah.china.huawei.com (10.48.152.209) by frapeml500007.china.huawei.com (7.182.85.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 9 Oct 2024 14:43:01 +0200 From: To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v13 01/18] EDAC: Add support for EDAC device features control Date: Wed, 9 Oct 2024 13:41:02 +0100 Message-ID: <20241009124120.1124-2-shiju.jose@huawei.com> X-Mailer: git-send-email 2.43.0.windows.1 In-Reply-To: <20241009124120.1124-1-shiju.jose@huawei.com> References: <20241009124120.1124-1-shiju.jose@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.48.152.209] X-ClientProxiedBy: lhrpeml500003.china.huawei.com (7.191.162.67) To frapeml500007.china.huawei.com (7.182.85.172) X-Stat-Signature: yk951au5zoipm8mqc3bxsgipwnx65ebq X-Rspamd-Queue-Id: C93D01A0012 X-Rspam-User: X-Rspamd-Server: rspam10 X-HE-Tag: 1728477788-537809 X-HE-Meta: U2FsdGVkX18aRGvHvlLykGBdoPxx4ao1kVJyAZukVGQRr+pTM0+WiVCmw9i2EyRWXcElhIdl/YQ/7/ugN3bBzZZCFBIcFKyu7KbEIkoy/ofdjLub+XdoraE6KVwagor6I31RvHOymbc8BwMugMkyCyP5cg1nUgpkDs3TB/xLnme4enyCnf/hGLmhelyZE0PulexrtnSV0SI5oxFjuX/ryib/BUzcttibj9nN/CLUziPz8hSA/dPtIJuPnSYE6jVjnQQkEiDqUsl6JPv9+k07SNLNFl3myUfGjyjYZw/agqbJ4uElZwtbfeqTqAr73AACyhPGxYfUxFnlxbtTm6b69bKCBUKfdhA6MThXRDehZnoaI05+U36kEgysGaqJsinI4H+2EitGgZ6uGlC08gOTj8qPlIOUCJpsWjqckgoaNYIlI10IdtLfsYSeFRIhXJsLC85US+Fu8i1r0Ub0UImhG5ashPKXKKXRZhy6FbGXa7UD3n6154kKQWXPj9R8dF2MOxq4AA0QZ68oHIi597n73Cvk534KsGzu+X+UBoiiABsh2nQNUdG4QmcV9er23esW9DCv+YXQPBmnDUu36vAVQDW0E9qI9FNWS23r4bxfrqB6gZclT83k4YFYgfrCmHSoCl+4XbOH6Z7aDbJu8IIR6qGH/VAjq0KUppSrxlbTTdyFn9OkPMNRSV5cfc5hgoykVKpvntptGKGvlUjxS6oSk/1Z0XwULMTCEiUsfIWYOedz4GNRVHijfAeLt5p+S0PE/M1myBvE5/wRO4dX6FmY6UWHISGnnj/eioi0vUaMt0JqMntJ25df4LLAXK0EwaEjpiJSOrz5pg0k/szP3B89RRdrVzXijwOt04bz5O3+oZqSIKn3pfzFJhRNMy5aCW3IGdzjpBlZMQlHuKpruIWoCgGhHjgo88JLNkXFhiHYe9ROnmmvNgUUvAEMwUz9NkucEhcPEpMNMSTRnTYzu7W Kmegykgi fw5odIqRmK7DOaU1Outuioq/DJS58qXDJFTzmhrR+Bsd8UtKWPMknMBis0fTkktiCVraBvP4h7xBcphy6a3Mytudkj9Xx1KkXXwmwSg5/1phSQ1JvGm1IKtPV7UlSvVacxrrjjWqBsN21dCtXiVschHlG//S6UUMwuqADzmFY5Au1kiPalXUBxm/dC2ogNvpuVmewRRnMvodihBTubZWv1ueZ3g== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Shiju Jose Add generic EDAC device features control supports registering RAS features supported in the system. Driver exposes features control attributes to userspace in /sys/bus/edac/devices/// Co-developed-by: Jonathan Cameron Signed-off-by: Jonathan Cameron Signed-off-by: Shiju Jose --- drivers/edac/edac_device.c | 105 +++++++++++++++++++++++++++++++++++++ include/linux/edac.h | 32 +++++++++++ 2 files changed, 137 insertions(+) diff --git a/drivers/edac/edac_device.c b/drivers/edac/edac_device.c index 621dc2a5d034..0b8aa8150239 100644 --- a/drivers/edac/edac_device.c +++ b/drivers/edac/edac_device.c @@ -570,3 +570,108 @@ void edac_device_handle_ue_count(struct edac_device_ctl_info *edac_dev, block ? block->name : "N/A", count, msg); } EXPORT_SYMBOL_GPL(edac_device_handle_ue_count); + +/* EDAC device feature */ +static void edac_dev_release(struct device *dev) +{ + struct edac_dev_feat_ctx *ctx = container_of(dev, struct edac_dev_feat_ctx, dev); + + kfree(ctx->dev.groups); + kfree(ctx); +} + +const struct device_type edac_dev_type = { + .name = "edac_dev", + .release = edac_dev_release, +}; + +static void edac_dev_unreg(void *data) +{ + device_unregister(data); +} + +/** + * edac_dev_register - register device for RAS features with EDAC + * @parent: client device. + * @name: client device's name. + * @private: parent driver's data to store in the context if any. + * @num_features: number of RAS features to register. + * @ras_features: list of RAS features to register. + * + * Return: + * * %0 - Success. + * * %-EINVAL - Invalid parameters passed. + * * %-ENOMEM - Dynamic memory allocation failed. + * + * The new edac_dev_feat_ctx would be freed automatically. + */ +int edac_dev_register(struct device *parent, char *name, + void *private, int num_features, + const struct edac_dev_feature *ras_features) +{ + const struct attribute_group **ras_attr_groups; + struct edac_dev_feat_ctx *ctx; + int attr_gcnt = 0; + int ret, feat; + + if (!parent || !name || !num_features || !ras_features) + return -EINVAL; + + /* Double parse to make space for attributes */ + for (feat = 0; feat < num_features; feat++) { + switch (ras_features[feat].ft_type) { + /* Add feature specific code */ + default: + return -EINVAL; + } + } + + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + ctx->dev.parent = parent; + ctx->private = private; + + ras_attr_groups = kcalloc(attr_gcnt + 1, sizeof(*ras_attr_groups), GFP_KERNEL); + if (!ras_attr_groups) { + ret = -ENOMEM; + goto ctx_free; + } + + attr_gcnt = 0; + for (feat = 0; feat < num_features; feat++, ras_features++) { + switch (ras_features->ft_type) { + /* Add feature specific code */ + default: + ret = -EINVAL; + goto groups_free; + } + } + + ras_attr_groups[attr_gcnt] = NULL; + ctx->dev.bus = edac_get_sysfs_subsys(); + ctx->dev.type = &edac_dev_type; + ctx->dev.groups = ras_attr_groups; + dev_set_drvdata(&ctx->dev, ctx); + + ret = dev_set_name(&ctx->dev, name); + if (ret) + goto groups_free; + + ret = device_register(&ctx->dev); + if (ret) { + put_device(&ctx->dev); + goto groups_free; + return ret; + } + + return devm_add_action_or_reset(parent, edac_dev_unreg, &ctx->dev); + +groups_free: + kfree(ras_attr_groups); +ctx_free: + kfree(ctx); + return ret; +} +EXPORT_SYMBOL_GPL(edac_dev_register); diff --git a/include/linux/edac.h b/include/linux/edac.h index b4ee8961e623..1db008a82690 100644 --- a/include/linux/edac.h +++ b/include/linux/edac.h @@ -661,4 +661,36 @@ static inline struct dimm_info *edac_get_dimm(struct mem_ctl_info *mci, return mci->dimms[index]; } + +/* EDAC device features */ + +#define EDAC_FEAT_NAME_LEN 128 + +/* RAS feature type */ +enum edac_dev_feat { + RAS_FEAT_MAX +}; + +/* EDAC device feature information structure */ +struct edac_dev_data { + u8 instance; + void *private; +}; + +struct device; + +struct edac_dev_feat_ctx { + struct device dev; + void *private; +}; + +struct edac_dev_feature { + enum edac_dev_feat ft_type; + u8 instance; + void *ctx; +}; + +int edac_dev_register(struct device *parent, char *dev_name, + void *parent_pvt_data, int num_features, + const struct edac_dev_feature *ras_features); #endif /* _LINUX_EDAC_H_ */