From patchwork Mon Feb 10 20:26:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13968612 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48E5BC021A1 for ; Mon, 10 Feb 2025 20:27:31 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id B81B3280023; Mon, 10 Feb 2025 15:27:30 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id B30C528001E; Mon, 10 Feb 2025 15:27:30 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 98518280023; Mon, 10 Feb 2025 15:27:30 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 75D8F28001E for ; Mon, 10 Feb 2025 15:27:30 -0500 (EST) Received: from smtpin11.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay01.hostedemail.com (Postfix) with ESMTP id 3B3921C7634 for ; Mon, 10 Feb 2025 20:27:30 +0000 (UTC) X-FDA: 83105170260.11.1731C61 Received: from mail-pl1-f173.google.com (mail-pl1-f173.google.com [209.85.214.173]) by imf15.hostedemail.com (Postfix) with ESMTP id 47B15A000C for ; Mon, 10 Feb 2025 20:27:28 +0000 (UTC) Authentication-Results: imf15.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=IF6qE1bt; spf=pass (imf15.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.173 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1739219248; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=qihiC//CQppmEvCBgeNt37whYo0mSsmsLXBW9eHBYhI=; b=qJNGbqzkxrOTPErkuPihJ60IltDf/kjkm8aYbagDCkmxG/h4xihGObMFG1gNbBOz9b4D6v ZmmC/4vHr829ErJpjU5iKxF7ITioF2I7+W6OS8V+Udh3FewoSHnXakWw0e/FrPZdBcAUXC BQd1FtcUxBPEl5oXtF0JnNc4IdZSKVQ= ARC-Authentication-Results: i=1; imf15.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=IF6qE1bt; spf=pass (imf15.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.173 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1739219248; a=rsa-sha256; cv=none; b=lcYvK7hHqw7ba3uoLxEMolvCkjikHLmoKqai5Yn4Pp22qgviuuEYTC6Eo4EMMDz1uCbMA0 exEOptV+MtFFgjBpHuQVo2n6T+5J519S+7C5nHvV+whUkj2wNV3PuZLpas0Y3R698MOkKJ emKGBQns7SgWCfBODKA6X8RKNWZNm54= Received: by mail-pl1-f173.google.com with SMTP id d9443c01a7336-21f55fbb72bso56905945ad.2 for ; Mon, 10 Feb 2025 12:27:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1739219247; x=1739824047; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=qihiC//CQppmEvCBgeNt37whYo0mSsmsLXBW9eHBYhI=; b=IF6qE1bt9zAZTjlLXZMwaM9isexhY4uic+pYiH5OzBDG8hlYljE8SeimDHhnAIqLTV lL5hVKYf/KF1S6cB/UKylhrGCe+QbYsxqUdpNB/XaSLxVaBPDHW5M2hnQGfh0AgHu6zk IKwwD9c7mOQfkBA6RWcbKA+P0+wOYjw4FDQisU3bCui7as72/AFdaACd+eUo95ZZi1aw LvKhuPwZMn0enMvzxVZ3cqgz2gKYcPrg0QOqNG85UBcgcLKxMomGlgcImyg6eXy2BBgd 8WSGhaKowQjDNqBRoDn6nxwHsKoiRlm9Yj1vOATR+TZPny91ozOH8nvvT9kZ3FkJ8qES 7rnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739219247; x=1739824047; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qihiC//CQppmEvCBgeNt37whYo0mSsmsLXBW9eHBYhI=; b=f8k7tuGi52+mitg7ehin7nNUfJXA/7enkEkF0+VVxCccA0ybrJgORZXaCvni+fij8z MqUV2QfRFfmgn54e+a8L8AXFhaRCeSyPbxgWH9y6Pq3L+l1tbfiGfWRHybWCm7UOgYoX JYZngA10fxefsC0U0rsvkMjXXy991yXWCG6lByroJhM55MyaaW42ywGmrVRK108nlOys EjuNBqsU6ogjMi7J7X1OH+cS7fY2lU2LYr6hCHnphn6zuH1wQzqqtkQKlxeV3bnAzpCF SPXjT3vAugWyIRJMRKlPXike+AqfBl5Cd9WEB7hZ6Xtw23gfYXGx/3rW2biUKvUqz9Gk AVhA== X-Forwarded-Encrypted: i=1; AJvYcCUqzDjSkY0dPVuSMsNhrCOxC+Wq6afFlFtYbmMmjhIfzLlh2PTeF9YXBOhJSBKmAr7wS9obZ+9Z2g==@kvack.org X-Gm-Message-State: AOJu0YzNektx/qqvMI3kvOiy7553EbVyDhrpRlSUxHuKNcrMSRWmsS8w 7KqTOjfZUgUhvfcvOjmTktn3lI5sNzPayHOMqEZzryNjKLX0Fe3Etl+6GPBSOAk= X-Gm-Gg: ASbGncuzOju2YzJGtuB3Ni++NuqLk+sPFQpLL7EiWciqAlJiYK+AsgjPVvWGBEKIeTk qponx5qvL8zn2castXjSp6d0Z/IKcProVrSky6x4y7rGhHLtF3MQ612k5I5Ko4rrSU2tS27Ndxd 1AKM47SfHYgLJJs+BsfX8RU/2RfRDyoFII08Jd/sARgVeWxh29o6FLJKYWfRZOT2bNOUWYgLLii yf68BvGJOO440YEWspUWkzHpezJ/H9thrpbA+GU1VSUvgUHOvzvD8Xlm3tlEpC6u3CWHUmgMGRU JOk+zs6KIRoLygnlSXiuXlDhXQ== X-Google-Smtp-Source: AGHT+IF7EXANdfW+rLsLNvBS7WrISTRoOO6x3oQIFnuoI1GdkKkKLf31wWdGn3loj99yEU6jyJj2UA== X-Received: by 2002:a17:902:e802:b0:21f:4c8b:c514 with SMTP id d9443c01a7336-21f4e76391amr226903755ad.45.1739219247115; Mon, 10 Feb 2025 12:27:27 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21f3687c187sm83711555ad.168.2025.02.10.12.27.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2025 12:27:26 -0800 (PST) From: Deepak Gupta Date: Mon, 10 Feb 2025 12:26:51 -0800 Subject: [PATCH v10 18/27] riscv/ptrace: riscv cfi status and state via ptrace and in core files MIME-Version: 1.0 Message-Id: <20250210-v5_user_cfi_series-v10-18-163dcfa31c60@rivosinc.com> References: <20250210-v5_user_cfi_series-v10-0-163dcfa31c60@rivosinc.com> In-Reply-To: <20250210-v5_user_cfi_series-v10-0-163dcfa31c60@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Rspamd-Server: rspam11 X-Rspamd-Queue-Id: 47B15A000C X-Stat-Signature: 4y1um1pghagsqxuzztpuur9rxe9m3ank X-HE-Tag: 1739219248-389410 X-HE-Meta: U2FsdGVkX1/dLu6yETxLwi/s5b3rXC8KFMy5is+2jSerRiOfNmJt1ydA8LsSUB/w36J8KSl5TNvODeXai9/30LGvYae1YpeUIOx2UNXZhVboT65jy/MCMuTgvazbfHf/ZKWJOfcS8tdUMtUtNRYqxGcP6Gpoot0q5x8UYFZdMBi/PHkFenSgU22oEGz2c8R20+oRYX6scbcjSeGV9ddKQIBaglYHXJRGtN+3o2ZD4XrWWMLRb++W6yYQNZgDVOSx2bIp7rlBXVU7ioderSss4ynoDpqGkxcC0jbnx7UARTOCMMDODPn8kEYoi1k/uxCBpws/Qf+4FUZl33z3BexqqKx9ZTT01Jvt7cwubnNt7FwXyKUPd+f+2F7HADe/opfHolGpdGWVPLJXnsHFFOxr75VKlB0LCbJMEgFTFHMBybQpRJ4zG92iibjeWFG0sv21GQ0ViXqahGmkvR/dLo5bv9GixdjA3iAGNh7WBcsBk/F0ViMvgjeigehMAvqXBkNMSpHe2zy+0Rg/EFWHR0kfWnV3xppBvNREUHPuEIqI3pIoItfLXqWavj+1Wo2SDxbmI++AKMGO9bE5dqM50M7CyKKEOT2oZuaZ/1JA6XQODcdTcDN4rQhrlhVyhDISDthJJcJNgldk7Zjdcd6MPgMIaZIpBzslVte/DXhHURUNCsU4LaWW9Ir13y8bo92HLwr2noQN9jYwK4mNt3LSLJpLU/7E+7KbcL4vs27z23Lru9fwzqsq30cEFuFr5xHq5GLQ3BvI2mzVixYP3Eu8XmZWcwFYAnsQGWPZGK7THL0rKw/7pnuEELQEKPhHZBpZXDWBdudbCqq5PuUQcTxbmAmunYDyUL8kbn/W6piVTDH087E9aO1vYmYPmcY8ikNmBvxS1kkogc09xzIdQ6LQqRf7VvxF+vG1i51FAKzvhH7MMl8zrzU3rL/A1HVlw6FLYKSAPRQW2IM0ZOrwOypdvjg OXI9fhnr 2CSZUYE+Mul9ZVuaoYzQIVbRwE0/fgfxY+NS7so9nSd3zT9uB4LToDdYf2K4WYMDUWuaC7BEyLaMZdRghwryn4XyBkU36RwqSz7cXB/uWVI+XVBuksGBA+8ACm1X5thFG2nbFxAc+7EeHUE2oVQhOle2s7W4umtetGalW5+/fOwQhyYOG+WNAMZu5SYy4pO8CVVI8riLnBV9wgq4asavKICBbJSzB859U6IVvOY4phUOxjpMqYK9fTetI2QhHsy85YHNwLDqeLCjDoKdLNErYkGBKby48F11ZvobpDzXvYOQeoGvEdSuXITPQdj33/EI8Fgtx9ng2oOBLs925dlfEJx37ScVNQlT/ZMFQeX6kZoTpKDeGI9HhzFUON+Y99QF56egWffDpsC3xTekaYP+VIg1r2bNd8QWaI5PLO2S0/hZ+2v8tKybtKX2ZSFq3XPrPJ9IHxwrQdDN/gf0= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Expose a new register type NT_RISCV_USER_CFI for risc-v cfi status and state. Intentionally both landing pad and shadow stack status and state are rolled into cfi state. Creating two different NT_RISCV_USER_XXX would not be useful and wastage of a note type. Enabling or disabling of feature is not allowed via ptrace set interface. However setting `elp` state or setting shadow stack pointer are allowed via ptrace set interface. It is expected `gdb` might have use to fixup `elp` state or `shadow stack` pointer. Signed-off-by: Deepak Gupta --- arch/riscv/include/uapi/asm/ptrace.h | 18 ++++++++ arch/riscv/kernel/ptrace.c | 83 ++++++++++++++++++++++++++++++++++++ include/uapi/linux/elf.h | 1 + 3 files changed, 102 insertions(+) diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h index 659ea3af5680..e6571fba8a8a 100644 --- a/arch/riscv/include/uapi/asm/ptrace.h +++ b/arch/riscv/include/uapi/asm/ptrace.h @@ -131,6 +131,24 @@ struct __sc_riscv_cfi_state { unsigned long ss_ptr; /* shadow stack pointer */ }; +struct __cfi_status { + /* indirect branch tracking state */ + __u64 lp_en : 1; + __u64 lp_lock : 1; + __u64 elp_state : 1; + + /* shadow stack status */ + __u64 shstk_en : 1; + __u64 shstk_lock : 1; + + __u64 rsvd : sizeof(__u64) - 5; +}; + +struct user_cfi_state { + struct __cfi_status cfi_status; + __u64 shstk_ptr; +}; + #endif /* __ASSEMBLY__ */ #endif /* _UAPI_ASM_RISCV_PTRACE_H */ diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index ea67e9fb7a58..df8b7c6ab671 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -19,6 +19,7 @@ #include #include #include +#include enum riscv_regset { REGSET_X, @@ -31,6 +32,9 @@ enum riscv_regset { #ifdef CONFIG_RISCV_ISA_SUPM REGSET_TAGGED_ADDR_CTRL, #endif +#ifdef CONFIG_RISCV_USER_CFI + REGSET_CFI, +#endif }; static int riscv_gpr_get(struct task_struct *target, @@ -184,6 +188,75 @@ static int tagged_addr_ctrl_set(struct task_struct *target, } #endif +#ifdef CONFIG_RISCV_USER_CFI +static int riscv_cfi_get(struct task_struct *target, + const struct user_regset *regset, + struct membuf to) +{ + struct user_cfi_state user_cfi; + struct pt_regs *regs; + + regs = task_pt_regs(target); + + user_cfi.cfi_status.lp_en = is_indir_lp_enabled(target); + user_cfi.cfi_status.lp_lock = is_indir_lp_locked(target); + user_cfi.cfi_status.elp_state = (regs->status & SR_ELP); + + user_cfi.cfi_status.shstk_en = is_shstk_enabled(target); + user_cfi.cfi_status.shstk_lock = is_shstk_locked(target); + user_cfi.shstk_ptr = get_active_shstk(target); + + return membuf_write(&to, &user_cfi, sizeof(user_cfi)); +} + +/* + * Does it make sense to allowing enable / disable of cfi via ptrace? + * Not allowing enable / disable / locking control via ptrace for now. + * Setting shadow stack pointer is allowed. GDB might use it to unwind or + * some other fixup. Similarly gdb might want to suppress elp and may want + * to reset elp state. + */ +static int riscv_cfi_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + int ret; + struct user_cfi_state user_cfi; + struct pt_regs *regs; + + regs = task_pt_regs(target); + + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &user_cfi, 0, -1); + if (ret) + return ret; + + /* + * Not allowing enabling or locking shadow stack or landing pad + * There is no disabling of shadow stack or landing pad via ptrace + * rsvd field should be set to zero so that if those fields are needed in future + */ + if (user_cfi.cfi_status.lp_en || user_cfi.cfi_status.lp_lock || + user_cfi.cfi_status.shstk_en || user_cfi.cfi_status.shstk_lock || + !user_cfi.cfi_status.rsvd) + return -EINVAL; + + /* If lpad is enabled on target and ptrace requests to set / clear elp, do that */ + if (is_indir_lp_enabled(target)) { + if (user_cfi.cfi_status.elp_state) /* set elp state */ + regs->status |= SR_ELP; + else + regs->status &= ~SR_ELP; /* clear elp state */ + } + + /* If shadow stack enabled on target, set new shadow stack pointer */ + if (is_shstk_enabled(target)) + set_active_shstk(target, user_cfi.shstk_ptr); + + return 0; +} +#endif + static const struct user_regset riscv_user_regset[] = { [REGSET_X] = { .core_note_type = NT_PRSTATUS, @@ -224,6 +297,16 @@ static const struct user_regset riscv_user_regset[] = { .set = tagged_addr_ctrl_set, }, #endif +#ifdef CONFIG_RISCV_USER_CFI + [REGSET_CFI] = { + .core_note_type = NT_RISCV_USER_CFI, + .align = sizeof(__u64), + .n = sizeof(struct user_cfi_state) / sizeof(__u64), + .size = sizeof(__u64), + .regset_get = riscv_cfi_get, + .set = riscv_cfi_set, + }, +#endif }; static const struct user_regset_view riscv_user_native_view = { diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h index b44069d29cec..b9daed4ab780 100644 --- a/include/uapi/linux/elf.h +++ b/include/uapi/linux/elf.h @@ -452,6 +452,7 @@ typedef struct elf64_shdr { #define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ #define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */ +#define NT_RISCV_USER_CFI 0x903 /* RISC-V shadow stack state */ #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */ #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */