From patchwork Mon Mar 10 14:52:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 14010198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B504C282EC for ; Mon, 10 Mar 2025 14:53:01 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 1563328000E; Mon, 10 Mar 2025 10:53:00 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 0E278280001; Mon, 10 Mar 2025 10:53:00 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id E032A28000E; Mon, 10 Mar 2025 10:52:59 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id BE980280001 for ; Mon, 10 Mar 2025 10:52:59 -0400 (EDT) Received: from smtpin08.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay10.hostedemail.com (Postfix) with ESMTP id 1CA91C1135 for ; Mon, 10 Mar 2025 14:53:00 +0000 (UTC) X-FDA: 83205933720.08.2F9AE8A Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) by imf10.hostedemail.com (Postfix) with ESMTP id 12E11C000B for ; Mon, 10 Mar 2025 14:52:57 +0000 (UTC) Authentication-Results: imf10.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=jAWbkeAT; spf=pass (imf10.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.169 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1741618378; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=hK7DlmuIRYzIsuvvXHgsbKnv3WN7JKJpEt1D7vAnJaQ=; b=oEPkUyUsUbNHMlcOBCdKlULdpO3Y/8svYRqSZ2cDW5tueQe6+3aFDY9eOvdIerwDghPPC2 nMSMewI+pnJOKw0GptT9fSc1Vx8Il1Qiar74QnxHMMXa9tZiHPf9uqSx56w3mpi/iZsruN 0WNr16cBKzA/usOuZ/jNGT7elGddvTo= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1741618378; a=rsa-sha256; cv=none; b=ZDwvFNS4+39lcFyCWTSiIkXa3bWr/Dp1Yma2/ZyqwYf9E3K93q2FHge0ipWbn7pdkqiDq6 LOZ7vYWdMz2DNcqGA8ku/YyFYH+mMP8/zZlgA8QHFJ/Km6nqMGj2lgn3uQ6yJCT60h10zS TI8rhtgDe3UUUs+eXEx/G/ov+F4QFHs= ARC-Authentication-Results: i=1; imf10.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=jAWbkeAT; spf=pass (imf10.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.169 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-224100e9a5cso80029405ad.2 for ; Mon, 10 Mar 2025 07:52:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1741618377; x=1742223177; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hK7DlmuIRYzIsuvvXHgsbKnv3WN7JKJpEt1D7vAnJaQ=; b=jAWbkeATJl9mUXXWANH5Jx9usQU/dWBzpuWaSdiC4LoPQ7UOYQQnA57bx07dIFumJ3 +jHCENSTF0JhgYKYUU5nsfd1Dq/GZyfTuqMJ6OuIbIGKpvPlDaIxVYGo0Z2/h8JFMy2H TDv18GlZPojwBBaAGE8VyGJId2XJTfQPqhYSuXUesVHfGVdwweCiGKM88NE8CE3Q6zej aZvkBFcRI9zy8fjgOmalKW/VwyLqf7pBP/iAf6o4W/a9vT5DDgkE0qVBs1OgmHJYNM3h iqYrlGUPhmtzCrhbC3O6NeyAoJIaOqqBBCHE+4FX5rNSlSYdUTroQQZycPcmV6OxUviy eufA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741618377; x=1742223177; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hK7DlmuIRYzIsuvvXHgsbKnv3WN7JKJpEt1D7vAnJaQ=; b=VtcUGU52PmYDKLG8W1a5mRyw4cDf4Yh6Pmux/Cbn5aqarO/UXzLfsejfvKCyxuNxrn DCQMkSpBlIOO7jmklGZuWJFIn1RDf0qLzt0IdEZsArncPZwgwYrvy5EtVVEYaYyBNIp8 h4o0KIYxwckrSz+NaMChuWy8xx0Ne952UawyuPi3rMQXo1qBipfPP2MPlaiRlxAA6oz6 3VGF9Ujfrl/67ooYtvZbtEMe3KeEvrBV249TGmiu1tBn5Lv6slUPYixC1faQ0fIe39Ut mZ8TGDuQRg30iCRSTAjGfwmiOZBnBAzwaKg44EOfmIfXwIOhMrE60xz9shT2O5eHA9Z0 DWUQ== X-Forwarded-Encrypted: i=1; AJvYcCW8VzfJhcVQspzheo4AA54jG113tkB3UHb54mvdP+di25HfLKA6ErTIIhQnd9S6PmK30K0LY4hXqA==@kvack.org X-Gm-Message-State: AOJu0Yy/iLjdLdgA7hMWo6l9/b+3Qu3RhhYRu2boIvbDaJgw6wo/pgAX PEfRwVkqDO6rAmaKG8DRPGg/HYwtuTnKvtjzyzWRFzfdmZXaT6l09w/FcpB3d/Y= X-Gm-Gg: ASbGncvaXtrCPMlFKqczzlvRIM42JneOKombUbyZxRl4mHgXAv1PGU3gDWoZo2s+jWi VDFL/pCfdYH7oCOfCsfKfeeZ+pbJDMub872rXZdDSzFMOeNZZcUG4e/WoP/4LaUk92xbp6QzHnv jr02EICtucJiV0pXKcqmV82AVM5hWc4TFUQgkJCpPGWbtW7pm7PzZEOAlsX30tDKb/+3fzXzTB5 obmEVf1a6cTlGWKOAI4nEbP0+/Grn7qkYcyHNDMDUv22NtXk7xCnGcKuBuPNkFiQiGebnGF1V2K aUQaEt8qgMLB4t67hR0v+3NETyZQIzri12HZAgvY8pLWbPp4s/+2nLs= X-Google-Smtp-Source: AGHT+IGqKWX94qO9AqEOI9XVMPr9YtNG73DineLHU1SUa0qmkdl6iHIBj3KU2DOsCD0Dz98oJGoQVg== X-Received: by 2002:a05:6a00:b86:b0:736:50c4:3e0f with SMTP id d2e1a72fcca58-736aaa373b8mr17095202b3a.10.1741618376979; Mon, 10 Mar 2025 07:52:56 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-736d11d4600sm2890275b3a.116.2025.03.10.07.52.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Mar 2025 07:52:56 -0700 (PDT) From: Deepak Gupta Date: Mon, 10 Mar 2025 07:52:32 -0700 Subject: [PATCH v11 10/27] riscv/mm: Implement map_shadow_stack() syscall MIME-Version: 1.0 Message-Id: <20250310-v5_user_cfi_series-v11-10-86b36cbfb910@rivosinc.com> References: <20250310-v5_user_cfi_series-v11-0-86b36cbfb910@rivosinc.com> In-Reply-To: <20250310-v5_user_cfi_series-v11-0-86b36cbfb910@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam12 X-Rspam-User: X-Rspamd-Queue-Id: 12E11C000B X-Stat-Signature: 65g5ocxzpuri65uez5jtaa4pnkay7ro3 X-HE-Tag: 1741618377-877476 X-HE-Meta: U2FsdGVkX18Na8Mh1AB9pMqXr1onJgbJ1HGZSt6HEV8RsO6juvPcFGdVxW3pXoASFVUehztStGkzdiBcpAY11y92J29ekUMW21wmqzym1bfsFfnHB8j/nkwW6TNarmazAFeKOOzwOzeg4tDcxR9QVPtfUNrTaQZSqQMSmg5XIVzKkR38TCEec0sIkBD+kbLGE/5qO5gqJW5fFXJAZinVpBFCj2+JzDjUwsBkyrgR+9Sx+KxLpkfJR66314INsWS1FlVOQTH+5YPB5YqS0zdejhQ90re66MIkflhhWaYVjI0g1I1gZ8DM/U/gwOHCZruoFt9yW82SYjJeLV4CX77+3jMDcj16nqQzetWMccPTrprFpwbps54nj3o12xHJROzEguueShFI7K1a2g14AqMKrhf7pJEcLbldbFtjCaNkjTmjr/4rhR/hBYFswx2tFwtki+tfxENXWUDdPmU4KT8CjFDMPVWVGldxK+0NywaxHXVEAIDiL5xt5VXKy5Vi1R9um9d4yxsN4o9XD7PermkUO+LDCLegDdrY17bD4SU3VrkxW1xbIjHM0vHRENWXAw/dRQ4rs7HVCqafzMvFQkrGJCfx0RGym/Srzz+TXTJO96XBxHX2/oEqi0dxad8mFw0t09v2GshFQf0ghSjPwe1va2jdP5J0X2UF8pa97vd8jNIduV0lDRhu8zopuc1oh+TdEcCQYON5tZFJpzgmr8KpkPDL9o3InGf1m17vS8BQdMU5v17B9f4xKvoMFrB6874vyiynH7Axk1JBKpOthjIFA5dQXg1nDpL73tvbC2fM+YVQKRYL8H/akCH+P0eg2eSSV8rutxPxptHYk04pp9Svwy50eksUc4BSHoNejjCR4Rg5bGItNf7NmdRF1E87Feyps7Fz0t90V4CWf1IAS0ojKYre8ssNimpCfYCBi+A2CHENmSBIw2kP9nmkfC0f0Rq7rICFPdcqgeWZ7MXgTZq B8zeRIZ2 gJCRChO+LzZabZ97ULi8gKrShujgcugTorn0z8NH9GkH0yTZpH0PzksbVAjqBy4oav1lB0XTKYsfqZsmbHj8qLRWFjtY+SRKEBnfTbj9UdkfuA//GYeRzaavwLkD2hdeqnzjpvV9B4K80AdQm+M+W3mP+S7v/gXVLF/stuXCPoyX+AwWooIR9JMkSN56E2dcc58vopcOLx2bVUT2hooIzjkyLmslm3N7f4UPqnZ4U5SRPYbbOy3P3U7siAn1Jw9FR/NO+WuXtFsAVpZeQga+47lF0YiBnnDcKKKO03iLjqbOl3s92jqpgrG3k4esWNSF2StrmewoguYCEecUhpWK6Sc/J3P+D5cJ36sIbDiw4WzptW5JrwMPvItHQ7RbgK08FdwLzRVvFXrxDPzUBmKXyjP/3sJj3SH304f3m+Jdc3m5bChpskg+EiJVyM33D8IkWYLWLB+UL6ZqdCSSIapF10Li4K/s/AAW052gQZfJikE7Z2+TbVCvEJ+Z9nEl/8UILdyUY X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: As discussed extensively in the changelog for the addition of this syscall on x86 ("x86/shstk: Introduce map_shadow_stack syscall") the existing mmap() and madvise() syscalls do not map entirely well onto the security requirements for shadow stack memory since they lead to windows where memory is allocated but not yet protected or stacks which are not properly and safely initialised. Instead a new syscall map_shadow_stack() has been defined which allocates and initialises a shadow stack page. This patch implements this syscall for riscv. riscv doesn't require token to be setup by kernel because user mode can do that by itself. However to provide compatibility and portability with other architectues, user mode can specify token set flag. Signed-off-by: Deepak Gupta --- arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/usercfi.c | 144 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 145 insertions(+) diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 8d186bfced45..3a861d320654 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -125,3 +125,4 @@ obj-$(CONFIG_ACPI) += acpi.o obj-$(CONFIG_ACPI_NUMA) += acpi_numa.o obj-$(CONFIG_GENERIC_CPU_VULNERABILITIES) += bugs.o +obj-$(CONFIG_RISCV_USER_CFI) += usercfi.o diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c new file mode 100644 index 000000000000..24022809a7b5 --- /dev/null +++ b/arch/riscv/kernel/usercfi.c @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024 Rivos, Inc. + * Deepak Gupta + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SHSTK_ENTRY_SIZE sizeof(void *) + +/* + * Writes on shadow stack can either be `sspush` or `ssamoswap`. `sspush` can happen + * implicitly on current shadow stack pointed to by CSR_SSP. `ssamoswap` takes pointer to + * shadow stack. To keep it simple, we plan to use `ssamoswap` to perform writes on shadow + * stack. + */ +static noinline unsigned long amo_user_shstk(unsigned long *addr, unsigned long val) +{ + /* + * Never expect -1 on shadow stack. Expect return addresses and zero + */ + unsigned long swap = -1; + + __enable_user_access(); + asm goto( + ".option push\n" + ".option arch, +zicfiss\n" + "1: ssamoswap.d %[swap], %[val], %[addr]\n" + _ASM_EXTABLE(1b, %l[fault]) + RISCV_ACQUIRE_BARRIER + ".option pop\n" + : [swap] "=r" (swap), [addr] "+A" (*addr) + : [val] "r" (val) + : "memory" + : fault + ); + __disable_user_access(); + return swap; +fault: + __disable_user_access(); + return -1; +} + +/* + * Create a restore token on the shadow stack. A token is always XLEN wide + * and aligned to XLEN. + */ +static int create_rstor_token(unsigned long ssp, unsigned long *token_addr) +{ + unsigned long addr; + + /* Token must be aligned */ + if (!IS_ALIGNED(ssp, SHSTK_ENTRY_SIZE)) + return -EINVAL; + + /* On RISC-V we're constructing token to be function of address itself */ + addr = ssp - SHSTK_ENTRY_SIZE; + + if (amo_user_shstk((unsigned long __user *)addr, (unsigned long)ssp) == -1) + return -EFAULT; + + if (token_addr) + *token_addr = addr; + + return 0; +} + +static unsigned long allocate_shadow_stack(unsigned long addr, unsigned long size, + unsigned long token_offset, bool set_tok) +{ + int flags = MAP_ANONYMOUS | MAP_PRIVATE; + struct mm_struct *mm = current->mm; + unsigned long populate, tok_loc = 0; + + if (addr) + flags |= MAP_FIXED_NOREPLACE; + + mmap_write_lock(mm); + addr = do_mmap(NULL, addr, size, PROT_READ, flags, + VM_SHADOW_STACK | VM_WRITE, 0, &populate, NULL); + mmap_write_unlock(mm); + + if (!set_tok || IS_ERR_VALUE(addr)) + goto out; + + if (create_rstor_token(addr + token_offset, &tok_loc)) { + vm_munmap(addr, size); + return -EINVAL; + } + + addr = tok_loc; + +out: + return addr; +} + +SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size, unsigned int, flags) +{ + bool set_tok = flags & SHADOW_STACK_SET_TOKEN; + unsigned long aligned_size = 0; + + if (!cpu_supports_shadow_stack()) + return -EOPNOTSUPP; + + /* Anything other than set token should result in invalid param */ + if (flags & ~SHADOW_STACK_SET_TOKEN) + return -EINVAL; + + /* + * Unlike other architectures, on RISC-V, SSP pointer is held in CSR_SSP and is available + * CSR in all modes. CSR accesses are performed using 12bit index programmed in instruction + * itself. This provides static property on register programming and writes to CSR can't + * be unintentional from programmer's perspective. As long as programmer has guarded areas + * which perform writes to CSR_SSP properly, shadow stack pivoting is not possible. Since + * CSR_SSP is writeable by user mode, it itself can setup a shadow stack token subsequent + * to allocation. Although in order to provide portablity with other architecture (because + * `map_shadow_stack` is arch agnostic syscall), RISC-V will follow expectation of a token + * flag in flags and if provided in flags, setup a token at the base. + */ + + /* If there isn't space for a token */ + if (set_tok && size < SHSTK_ENTRY_SIZE) + return -ENOSPC; + + if (addr && (addr & (PAGE_SIZE - 1))) + return -EINVAL; + + aligned_size = PAGE_ALIGN(size); + if (aligned_size < size) + return -EOVERFLOW; + + return allocate_shadow_stack(addr, aligned_size, size, set_tok); +}