From patchwork Mon Mar 10 14:52:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 14010205 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7ABA4C28B2E for ; Mon, 10 Mar 2025 14:53:23 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 6D140280015; Mon, 10 Mar 2025 10:53:12 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 65668280011; Mon, 10 Mar 2025 10:53:12 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 4531A280015; Mon, 10 Mar 2025 10:53:12 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id 264E2280011 for ; Mon, 10 Mar 2025 10:53:12 -0400 (EDT) Received: from smtpin16.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay03.hostedemail.com (Postfix) with ESMTP id 7F3B1A984D for ; Mon, 10 Mar 2025 14:53:12 +0000 (UTC) X-FDA: 83205934224.16.8919CEB Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) by imf10.hostedemail.com (Postfix) with ESMTP id 72441C0019 for ; Mon, 10 Mar 2025 14:53:10 +0000 (UTC) Authentication-Results: imf10.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=f4dEWaGL; dmarc=none; spf=pass (imf10.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.175 as permitted sender) smtp.mailfrom=debug@rivosinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1741618390; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=N78rd5bu5L3Nb7UCylb6NhXzPkib+ej1wIZfC16ALRg=; b=VUK4AfhH6a62ReLM+AHtCyXL9yCTenljykWFdqIXKPsbBeIa6p6Nu8+fcY9ZH9qwUcmuT3 BixENmIdreGjqA17ZN8kLTvH24OGvvWKsm1gTDMCo9HQYoDuXkmcQy2qbx644t8hqguoFz OB/TP7MfLxeE0Wd2+xcqIDhtO9a8j7c= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1741618390; a=rsa-sha256; cv=none; b=7HsefF1CqzNqvtzhd+ybjYjDVQiR9lBandtHvyVvFftfXVgl7rqK7kkCVYYpa+tD7nPlZm yjeujErUiKrpoAItrH4KehvIcvkSZpYZCsVceEjsIJHw5sCvMWBmF99er9PRSErulr1wp4 y8PI8Zux1G21122EyHVYJU5SZJYFDy4= ARC-Authentication-Results: i=1; imf10.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=f4dEWaGL; dmarc=none; spf=pass (imf10.hostedemail.com: domain of debug@rivosinc.com designates 209.85.214.175 as permitted sender) smtp.mailfrom=debug@rivosinc.com Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-223a7065ff8so3881785ad.0 for ; Mon, 10 Mar 2025 07:53:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1741618389; x=1742223189; darn=kvack.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=N78rd5bu5L3Nb7UCylb6NhXzPkib+ej1wIZfC16ALRg=; b=f4dEWaGLYFdj4GD6s9sdalCw5YjVKchMNBM0RxHb9/Lnvw5soqpv8nYj3mF8owXA/C UlVAxHeSmzwpQHxkARITiXr+G+xcZRENpMuB0EsrpzYYkja4MIPLdtNRxjgpVq+5wobK Pk5RROID5y96sd9Q70nc8wS/gAS9A/1QKMjWliuYGO41dQtmaxQ6gOCs8svvmiuLm+p+ n6g0ucG4JW8dNnRLyjBzwmDLAcCBVcbD/HnHL1Y0XBpdYPcE9SAjtMQ2FcvdpSZGoLGn 4vnH0O2CYOfR7ChPY4ZtYxK6brtZ2r7FDd2EZlUvgaP/syTbQSMjiIo+R6wRHq2VlYP1 l6+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741618389; x=1742223189; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=N78rd5bu5L3Nb7UCylb6NhXzPkib+ej1wIZfC16ALRg=; b=DBfMJQq6AC1J4Sg/DAbjgD9cG2wYvFUugsK1fgYkCW8lznEuEyPBS1u747KkPkjQWo LajTdij8nzm79c4zcERXJvJQhHjjGw83ZTNegJBE1WgTDgpE6geXJiV3Gr6ZlHpKTs2B hrsbp7dsIzDdkerS/xhiNvwV4PsfsP1SaSjEX+6hG2ZbERBL+7VVQI2hBvtHU9qcedYq YRtLovbFB0l0L4shUM/b/k+alqiCYLi/DM+A9bG3jRVmNMfVEA9goiMUQ7XSwhXp5ZaG O+lY9lGbdxOcBvI53hRX7pxq1hp0b3juPQzunENDYKDIqZlS5Tf3R5PXsMIveWvgOoYq WKyg== X-Forwarded-Encrypted: i=1; AJvYcCXGfRJRbT16hoPu+K20kcl/D/3xlS3iJOwZKHl+EXRlSK/DLVXKC9vSEj4GAF0gVYKOIhRSAM0OnQ==@kvack.org X-Gm-Message-State: AOJu0YwwVJUm58V097G4ZEFIsIb35UGHVHYfubbLAYur0cVfsNxakL8m /kybhYG9PTXJ3batXf9cwzwbFr/6F7oNDQ7S2pBHTAY3+IHau3JFP+xIP5wjvUc= X-Gm-Gg: ASbGncuRZTA1MplPmWSoNBNRBjiUGsjhn76u0Qbmpo1/VFTNgSHMpkmMAiJEtZX9fNY XvpP+qZTISBrD43t976HfyJaP0aStFk69a0yFo61kGHKdXZxCu9KUMZ9VfdcS7k9cFpUk31L6Xz ggGby2w7+n5aU43tjJISxeKPOqK0qYq2s0tuMPGrJlvlD88wsgKtVCMDx0+ocD/bOBIaYrrinZ+ qk+EPNYiks1VWTEH78DFHF1qEJ2EpSWp2p3a5koQXAu5DWnsok0WH/w1faWZN5xSq/L0mpLVxXv ijnsHFsGfB7D4Tkr1KSXaAHIj3+sCebogI7MrVee7OPzKpYfLoHJ/GhiCJG3YKSTIg== X-Google-Smtp-Source: AGHT+IFeD/HgCjO9LcRex1YUUmRruVxizMZhpwj5TvOctT1vNUnUY9bR7/1JUpOvPThhyzvn2X9ItQ== X-Received: by 2002:a05:6a00:1703:b0:736:a6e0:e669 with SMTP id d2e1a72fcca58-736aaad3bb2mr22481649b3a.20.1741618389332; Mon, 10 Mar 2025 07:53:09 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-736d11d4600sm2890275b3a.116.2025.03.10.07.53.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Mar 2025 07:53:08 -0700 (PDT) From: Deepak Gupta Date: Mon, 10 Mar 2025 07:52:37 -0700 Subject: [PATCH v11 15/27] riscv: signal: abstract header saving for setup_sigcontext MIME-Version: 1.0 Message-Id: <20250310-v5_user_cfi_series-v11-15-86b36cbfb910@rivosinc.com> References: <20250310-v5_user_cfi_series-v11-0-86b36cbfb910@rivosinc.com> In-Reply-To: <20250310-v5_user_cfi_series-v11-0-86b36cbfb910@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com X-Mailer: b4 0.14.0 X-Rspam-User: X-Rspamd-Queue-Id: 72441C0019 X-Rspamd-Server: rspam08 X-Stat-Signature: 37s8mfr9ay5egd5zwyqp1ns8m4th3u3t X-HE-Tag: 1741618390-718111 X-HE-Meta: U2FsdGVkX18kxRVI0Ty5q5vIR3I6zj00SPTnGLtNHVrS+8oALxiBzcvYqTwdE5xztJKh6wFgNfj97J2XzYvNIOWh4i1CeyhcC04NlZOKUuRBPAw+WQxOGBPE/B4LvsCxL7ONvuYK2xipyuG6GkomDd63lu0G3y0GWT5+O1QqWbXZ1wCL/ZEYeC3f3tFc6/QuWsAW+d8qTOYP4QGjWJ971Gb+aade0Pvf0kqYfugPFR0Yia5PKFK5jSzu4/mCcTh2pysqlrgMOycsCIwUYtg1mO1dZfcvRA/AwGvKhJcPIi9390nVMkE4qoPFgy32dmQxgjtp66TH6V2GpVbw6FLzw9sUZ0bFz1kzoW8WO2AZEiXa8ldPm8meUgQA6CQOt/o6BooD1mWw2rZ3BddfeaQNdTKJRQLz9PfuOVIpZorc0PZutKFYOZZ2WvKNWX9c4b8A7hf2VTiP63qJOv3HNQ6e4ZL5XE7q85HD5hqX7Rq0T1jfZaDYCiKdeI3pQ9N/S1Rdu72gVtMMQ9lhzz8AxXo10UnQ8sCPFFs9F0p/5o1M7z502GVGwzxXGAsuI0MkFoJmGiTgcsw9x5FEOaTrnbhpDu1yKIae5E4ut0u9JcYL5nGyFSOI0221Px1Y8XawmfI5oduLMr/xVcTCaTMYf75DWjBsUco+E4/eCaIB+n7BoeiTZ1vNOAgrYzj95c9QoNYnO/qVa3PCi/fXmcZl8mjtJHJOYsHYA2EuynSC+3BDdeQwdd4OvWcQlPitsalM1mrkwea/AdDBoQn2o2YegNxc/XroV5POZl8Sc0FNMRiSIDVudBF4borTXEkj6J0mw5HFt4OqSIPeNz80ZRUeeyBzwLLLNEqsjXbqPu8bnXRGbD9iXA7ww2k090Y66A0arB6OIRZs9Ucdompn4z3mhHAa9gtKOY8pI9BX2pjfQ6m8aYrq+ONQt9OaLUBgP0hnwExEHrsMDD1AiQjKqgj2c9O pxIuuXox eQ+PGEFrgT/py9VqK1KFbFprKnIESGsYUPZb3jLBPa0NLGrhvFbPtg9ukGkxF9jrIxfMHrnEQxadsklkqB4LNEIUOakKEBBtnnQXvpK2EVz5SseFafy4muvG6U4UVYA2hMialKweqst3XdE2TTqt7nrEsm9knWtoanORbru10H69z5eAS9RF6tfBlVff9y7dRLflKnZzRH+chd1PCGPUfNtPkFuA+vckctHYYqObRL88NM5DENd7PxuI8dzokbWJOaMqZo6iD5ZbGyxgOoWIhMA78YFkkR4BSVfZK8J26q8leREaBttOI/oh4Giip/l3tqBCTjwiXI3hJJugauWhrJue4elUdAkgyqtCUM1ajKOH1FHyqSWY6B25CcT5IpfE9ihWZLiQZGLHz/4Q8Ns0RXXaW5gGMj23yLxdRMtoCTKiC0J1fjXzEcNnZsPmvJFldmpY8psb8GXd+9o85timwZihcg1mr4YxfxTbY X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Andy Chiu The function save_v_state() served two purposes. First, it saved extension context into the signal stack. Then, it constructed the extension header if there was no fault. The second part is independent of the extension itself. As a result, we can pull that part out, so future extensions may reuse it. This patch adds arch_ext_list and makes setup_sigcontext() go through all possible extensions' save() callback. The callback returns a positive value indicating the size of the successfully saved extension. Then the kernel proceeds to construct the header for that extension. The kernel skips an extension if it does not exist, or if the saving fails for some reasons. The error code is propagated out on the later case. This patch does not introduce any functional changes. Signed-off-by: Andy Chiu --- arch/riscv/include/asm/vector.h | 3 ++ arch/riscv/kernel/signal.c | 62 +++++++++++++++++++++++++++-------------- 2 files changed, 44 insertions(+), 21 deletions(-) diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h index e8a83f55be2b..05390538ea8a 100644 --- a/arch/riscv/include/asm/vector.h +++ b/arch/riscv/include/asm/vector.h @@ -407,6 +407,9 @@ static inline bool riscv_v_vstate_ctrl_user_allowed(void) { return false; } #define riscv_v_thread_free(tsk) do {} while (0) #define riscv_v_setup_ctx_cache() do {} while (0) #define riscv_v_thread_alloc(tsk) do {} while (0) +#define get_cpu_vector_context() do {} while (0) +#define put_cpu_vector_context() do {} while (0) +#define riscv_v_vstate_set_restore(task, regs) do {} while (0) #endif /* CONFIG_RISCV_ISA_V */ diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c index 94e905eea1de..80c70dccf09f 100644 --- a/arch/riscv/kernel/signal.c +++ b/arch/riscv/kernel/signal.c @@ -68,18 +68,19 @@ static long save_fp_state(struct pt_regs *regs, #define restore_fp_state(task, regs) (0) #endif -#ifdef CONFIG_RISCV_ISA_V - -static long save_v_state(struct pt_regs *regs, void __user **sc_vec) +static long save_v_state(struct pt_regs *regs, void __user *sc_vec) { - struct __riscv_ctx_hdr __user *hdr; struct __sc_riscv_v_state __user *state; void __user *datap; long err; - hdr = *sc_vec; - /* Place state to the user's signal context space after the hdr */ - state = (struct __sc_riscv_v_state __user *)(hdr + 1); + if (!IS_ENABLED(CONFIG_RISCV_ISA_V) || + !((has_vector() || has_xtheadvector()) && + riscv_v_vstate_query(regs))) + return 0; + + /* Place state to the user's signal context spac */ + state = (struct __sc_riscv_v_state __user *)sc_vec; /* Point datap right after the end of __sc_riscv_v_state */ datap = state + 1; @@ -97,15 +98,11 @@ static long save_v_state(struct pt_regs *regs, void __user **sc_vec) err |= __put_user((__force void *)datap, &state->v_state.datap); /* Copy the whole vector content to user space datap. */ err |= __copy_to_user(datap, current->thread.vstate.datap, riscv_v_vsize); - /* Copy magic to the user space after saving all vector conetext */ - err |= __put_user(RISCV_V_MAGIC, &hdr->magic); - err |= __put_user(riscv_v_sc_size, &hdr->size); if (unlikely(err)) - return err; + return -EFAULT; - /* Only progress the sv_vec if everything has done successfully */ - *sc_vec += riscv_v_sc_size; - return 0; + /* Only return the size if everything has done successfully */ + return riscv_v_sc_size; } /* @@ -142,10 +139,20 @@ static long __restore_v_state(struct pt_regs *regs, void __user *sc_vec) */ return copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize); } -#else -#define save_v_state(task, regs) (0) -#define __restore_v_state(task, regs) (0) -#endif + +struct arch_ext_priv { + __u32 magic; + long (*save)(struct pt_regs *regs, void __user *sc_vec); +}; + +struct arch_ext_priv arch_ext_list[] = { + { + .magic = RISCV_V_MAGIC, + .save = &save_v_state, + }, +}; + +const size_t nr_arch_exts = ARRAY_SIZE(arch_ext_list); static long restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) @@ -276,7 +283,8 @@ static long setup_sigcontext(struct rt_sigframe __user *frame, { struct sigcontext __user *sc = &frame->uc.uc_mcontext; struct __riscv_ctx_hdr __user *sc_ext_ptr = &sc->sc_extdesc.hdr; - long err; + struct arch_ext_priv *arch_ext; + long err, i, ext_size; /* sc_regs is structured the same as the start of pt_regs */ err = __copy_to_user(&sc->sc_regs, regs, sizeof(sc->sc_regs)); @@ -284,8 +292,20 @@ static long setup_sigcontext(struct rt_sigframe __user *frame, if (has_fpu()) err |= save_fp_state(regs, &sc->sc_fpregs); /* Save the vector state. */ - if ((has_vector() || has_xtheadvector()) && riscv_v_vstate_query(regs)) - err |= save_v_state(regs, (void __user **)&sc_ext_ptr); + for (i = 0; i < nr_arch_exts; i++) { + arch_ext = &arch_ext_list[i]; + if (!arch_ext->save) + continue; + + ext_size = arch_ext->save(regs, sc_ext_ptr + 1); + if (ext_size <= 0) { + err |= ext_size; + } else { + err |= __put_user(arch_ext->magic, &sc_ext_ptr->magic); + err |= __put_user(ext_size, &sc_ext_ptr->size); + sc_ext_ptr = (void *)sc_ext_ptr + ext_size; + } + } /* Write zero to fp-reserved space and check it on restore_sigcontext */ err |= __put_user(0, &sc->sc_extdesc.reserved); /* And put END __riscv_ctx_hdr at the end. */