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Fri, 17 Dec 2021 10:27:33 +0000 From: Christophe Leroy To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , "alex@ghiti.fr" CC: Christophe Leroy , "linux-kernel@vger.kernel.org" , "linuxppc-dev@lists.ozlabs.org" , "linux-mm@kvack.org" , "akpm@linux-foundation.org" , "catalin.marinas@arm.com" , "will@kernel.org" , "linux-arm-kernel@lists.infradead.org" , Toan Le , "linux-pci@vger.kernel.org" , =?utf-8?q?Krzyszto?= =?utf-8?q?f_Wilczy=C5=84ski?= , Bjorn Helgaas Subject: [PATCH v6 05/14] sizes.h: Add SZ_1T macro Thread-Topic: [PATCH v6 05/14] sizes.h: Add SZ_1T macro Thread-Index: AQHX8zC07qMBhzOyKkm4HzYDjm34Jg== Date: Fri, 17 Dec 2021 10:27:33 +0000 Message-ID: <94272ef87ad071d6d11e20bc5249608012714613.1639736449.git.christophe.leroy@csgroup.eu> References: In-Reply-To: Accept-Language: fr-FR, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: ec3499e0-e8bb-4fa7-77b1-08d9c147d697 x-ms-traffictypediagnostic: MR2P264MB0194:EE_ x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:639; 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dkim=none; spf=pass (imf30.hostedemail.com: domain of christophe.leroy@csgroup.eu designates 40.107.9.72 as permitted sender) smtp.mailfrom=christophe.leroy@csgroup.eu; dmarc=none X-HE-Tag: 1639736856-775203 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Today drivers/pci/controller/pci-xgene.c defines SZ_1T Move it into linux/sizes.h so that it can be re-used elsewhere. Cc: Toan Le Cc: linux-pci@vger.kernel.org Signed-off-by: Christophe Leroy Reviewed-by: Krzysztof Wilczyński Acked-by: Bjorn Helgaas --- drivers/pci/controller/pci-xgene.c | 1 - include/linux/sizes.h | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c index 56d0d50338c8..716dcab5ca47 100644 --- a/drivers/pci/controller/pci-xgene.c +++ b/drivers/pci/controller/pci-xgene.c @@ -49,7 +49,6 @@ #define EN_REG 0x00000001 #define OB_LO_IO 0x00000002 #define XGENE_PCIE_DEVICEID 0xE004 -#define SZ_1T (SZ_1G*1024ULL) #define PIPE_PHY_RATE_RD(src) ((0xc000 & (u32)(src)) >> 0xe) #define XGENE_V1_PCI_EXP_CAP 0x40 diff --git a/include/linux/sizes.h b/include/linux/sizes.h index 1ac79bcee2bb..84aa448d8bb3 100644 --- a/include/linux/sizes.h +++ b/include/linux/sizes.h @@ -47,6 +47,8 @@ #define SZ_8G _AC(0x200000000, ULL) #define SZ_16G _AC(0x400000000, ULL) #define SZ_32G _AC(0x800000000, ULL) + +#define SZ_1T _AC(0x10000000000, ULL) #define SZ_64T _AC(0x400000000000, ULL) #endif /* __LINUX_SIZES_H__ */