| Message ID | b020d8dcedb2753a894722147a0b5de25b2ae29b.1646847561.git.christophe.leroy@csgroup.eu (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Convert powerpc to default topdown mmap layout (v8) | expand |
On Wed, Mar 09, 2022 at 06:44:35PM +0100, Christophe Leroy wrote: > Today drivers/pci/controller/pci-xgene.c defines SZ_1T > > Move it into linux/sizes.h so that it can be re-used elsewhere. > > Link: https://lore.kernel.org/r/575cb7164cf124c75df7cb9242ea7374733942bf.1642752946.git.christophe.leroy@csgroup.eu > Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> > Reviewed-by: Krzysztof Wilczyński <kw@linux.com> > Acked-by: Bjorn Helgaas <bhelgaas@google.com> > Cc: Toan Le <toan@os.amperecomputing.com> > Cc: linux-pci@vger.kernel.org > --- > This patch is already in linux-next but not in Linus' tree yet What would you like me to do about this? It's in linux-next, which means it will go to Linus' tree during the next merge window. But this is 01/14; are there other patches that I should be looking at? Do I need to coordinate this with other patches that depend on it? > drivers/pci/controller/pci-xgene.c | 1 - > include/linux/sizes.h | 2 ++ > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c > index 0d5acbfc7143..77c1fe7e11f9 100644 > --- a/drivers/pci/controller/pci-xgene.c > +++ b/drivers/pci/controller/pci-xgene.c > @@ -49,7 +49,6 @@ > #define EN_REG 0x00000001 > #define OB_LO_IO 0x00000002 > #define XGENE_PCIE_DEVICEID 0xE004 > -#define SZ_1T (SZ_1G*1024ULL) > #define PIPE_PHY_RATE_RD(src) ((0xc000 & (u32)(src)) >> 0xe) > > #define XGENE_V1_PCI_EXP_CAP 0x40 > diff --git a/include/linux/sizes.h b/include/linux/sizes.h > index 1ac79bcee2bb..84aa448d8bb3 100644 > --- a/include/linux/sizes.h > +++ b/include/linux/sizes.h > @@ -47,6 +47,8 @@ > #define SZ_8G _AC(0x200000000, ULL) > #define SZ_16G _AC(0x400000000, ULL) > #define SZ_32G _AC(0x800000000, ULL) > + > +#define SZ_1T _AC(0x10000000000, ULL) > #define SZ_64T _AC(0x400000000000, ULL) > > #endif /* __LINUX_SIZES_H__ */ > -- > 2.34.1 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Le 10/03/2022 à 17:52, Bjorn Helgaas a écrit : > On Wed, Mar 09, 2022 at 06:44:35PM +0100, Christophe Leroy wrote: >> Today drivers/pci/controller/pci-xgene.c defines SZ_1T >> >> Move it into linux/sizes.h so that it can be re-used elsewhere. >> >> Link: https://lore.kernel.org/r/575cb7164cf124c75df7cb9242ea7374733942bf.1642752946.git.christophe.leroy@csgroup.eu >> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> >> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> >> Reviewed-by: Krzysztof Wilczyński <kw@linux.com> >> Acked-by: Bjorn Helgaas <bhelgaas@google.com> >> Cc: Toan Le <toan@os.amperecomputing.com> >> Cc: linux-pci@vger.kernel.org >> --- >> This patch is already in linux-next but not in Linus' tree yet > > What would you like me to do about this? It's in linux-next, which > means it will go to Linus' tree during the next merge window. > > But this is 01/14; are there other patches that I should be looking > at? Do I need to coordinate this with other patches that depend on > it? Yes sorry I should have said it. Patch 14/14 depends on it. Don't know yet what's the merge strategy for this series, there as not been any changes since v6 mid December and core parts are acked/reviewed so I would be happy if at least core mm parts could go this cycle. I sent a question to Michael and Andrew about it. Christophe
On Thu, Mar 10, 2022 at 06:09:51PM +0000, Christophe Leroy wrote: > > > Le 10/03/2022 à 17:52, Bjorn Helgaas a écrit : > > On Wed, Mar 09, 2022 at 06:44:35PM +0100, Christophe Leroy wrote: > >> Today drivers/pci/controller/pci-xgene.c defines SZ_1T > >> > >> Move it into linux/sizes.h so that it can be re-used elsewhere. > >> > >> Link: https://lore.kernel.org/r/575cb7164cf124c75df7cb9242ea7374733942bf.1642752946.git.christophe.leroy@csgroup.eu > >> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> > >> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> > >> Reviewed-by: Krzysztof Wilczyński <kw@linux.com> > >> Acked-by: Bjorn Helgaas <bhelgaas@google.com> > >> Cc: Toan Le <toan@os.amperecomputing.com> > >> Cc: linux-pci@vger.kernel.org > >> --- > >> This patch is already in linux-next but not in Linus' tree yet > > > > What would you like me to do about this? It's in linux-next, which > > means it will go to Linus' tree during the next merge window. > > > > But this is 01/14; are there other patches that I should be looking > > at? Do I need to coordinate this with other patches that depend on > > it? > > Yes sorry I should have said it. Patch 14/14 depends on it. > > Don't know yet what's the merge strategy for this series, there as not > been any changes since v6 mid December and core parts are acked/reviewed > so I would be happy if at least core mm parts could go this cycle. I > sent a question to Michael and Andrew about it. Since PCI is only minimally affected in this series, it would probably make more sense for it to be merged along with the rest of the series via a non-PCI tree. It has my ack, so this can certainly happen. If it does, I can easily drop it from the PCI tree. Bjorn
diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c index 0d5acbfc7143..77c1fe7e11f9 100644 --- a/drivers/pci/controller/pci-xgene.c +++ b/drivers/pci/controller/pci-xgene.c @@ -49,7 +49,6 @@ #define EN_REG 0x00000001 #define OB_LO_IO 0x00000002 #define XGENE_PCIE_DEVICEID 0xE004 -#define SZ_1T (SZ_1G*1024ULL) #define PIPE_PHY_RATE_RD(src) ((0xc000 & (u32)(src)) >> 0xe) #define XGENE_V1_PCI_EXP_CAP 0x40 diff --git a/include/linux/sizes.h b/include/linux/sizes.h index 1ac79bcee2bb..84aa448d8bb3 100644 --- a/include/linux/sizes.h +++ b/include/linux/sizes.h @@ -47,6 +47,8 @@ #define SZ_8G _AC(0x200000000, ULL) #define SZ_16G _AC(0x400000000, ULL) #define SZ_32G _AC(0x800000000, ULL) + +#define SZ_1T _AC(0x10000000000, ULL) #define SZ_64T _AC(0x400000000000, ULL) #endif /* __LINUX_SIZES_H__ */