From patchwork Thu Oct 3 04:00:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ramuthevar,Vadivel MuruganX" X-Patchwork-Id: 11172047 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BB5081709 for ; Thu, 3 Oct 2019 04:00:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A277B2085B for ; Thu, 3 Oct 2019 04:00:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725783AbfJCEAv (ORCPT ); Thu, 3 Oct 2019 00:00:51 -0400 Received: from mga09.intel.com ([134.134.136.24]:57499 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725763AbfJCEAu (ORCPT ); Thu, 3 Oct 2019 00:00:50 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Oct 2019 21:00:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,250,1566889200"; d="scan'208";a="343545589" Received: from sgsxdev004.isng.intel.com (HELO localhost) ([10.226.88.13]) by orsmga004.jf.intel.com with ESMTP; 02 Oct 2019 21:00:47 -0700 From: "Ramuthevar,Vadivel MuruganX" To: ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, adrian.hunter@intel.com, michal.simek@xilinx.com, robh+dt@kernel.org, mark.rutland@arm.com, andriy.shevchenko@intel.com, cheol.yong.kim@intel.com, qi-ming.wu@intel.com, "Ramuthevar,Vadivel MuruganX" Subject: [PATCH v1 0/2] mmc: sdhci-of-arasan: Add Support for Intel LGM SDXC Date: Thu, 3 Oct 2019 12:00:30 +0800 Message-Id: <20191003040032.37696-1-vadivel.muruganx.ramuthevar@linux.intel.com> X-Mailer: git-send-email 2.11.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The current arasan sdhci PHY configuration isn't compatible with the PHY on Intel's LGM(Lightning Mountain) SoC devices. Therefore, add a new compatible, to adapt the Intel's LGM SDXC PHY with arasan-sdhc controller to configure the PHY. Linux code base : V5.4-rc1 Ramuthevar Vadivel Murugan (2): dt-bindings: mmc: sdhci-of-arasan: Add new compatible for Intel LGM SDXC mmc: sdhci-of-arasan: Add Support for Intel LGM SDXC Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 17 +++++++++++++++++ drivers/mmc/host/sdhci-of-arasan.c | 15 +++++++++++++++ 2 files changed, 32 insertions(+)