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Wed, 26 Mar 2014 07:32:01 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N310017TK13JI30@mailout2.samsung.com>; Wed, 26 Mar 2014 20:31:51 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [203.254.230.50]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 3F.56.10092.7AAB2335; Wed, 26 Mar 2014 20:31:51 +0900 (KST) X-AuditID: cbfee68f-b7f156d00000276c-1d-5332baa78151 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 34.8E.28157.7AAB2335; Wed, 26 Mar 2014 20:31:51 +0900 (KST) Received: from DOTGIHJUN01 ([12.36.185.168]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N31000N8K13E0A0@mmp1.samsung.com>; Wed, 26 Mar 2014 20:31:51 +0900 (KST) From: Seungwon Jeon To: linux-samsung-soc@vger.kernel.org, linux-mmc@vger.kernel.org Cc: 'Chris Ball' , 'Kukjin Kim' , 'Jaehoon Chung' , 'Ulf Hansson' , 'Alim Akhtar' References: In-reply-to: Subject: [PATCH v2 6/7] ARM: dts: drop dw-mshc-ciu-div property from Exynos Date: Wed, 26 Mar 2014 20:31:50 +0900 Message-id: <000601cf48e6$fad62590$f08270b0$%jun@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac9FDjtZo1aMTMCOStGdx+bxiO4TmwD1P6hw Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrBIsWRmVeSWpSXmKPExsVy+t8zI93lu4yCDZr6DCwezNvGZjHh8nZG ixu/2lgtehdcZbM48r+f0WLG+X1MFsfXhjuwe9y5tofN48arhUwefVtWMXp83iQXwBLFZZOS mpNZllqkb5fAlXFr5l7mgt8+Ffumr2NvYHxq18XIySEhYCLRdeE6I4QtJnHh3nq2LkYuDiGB ZYwSR/58Y+1i5AAr2rJEESK+iFHi7NG7LBDOH0aJCYufsoB0swloSfx984YZxBYRcJB4d/0C E4jNLHCCUWLeYmOQQUIC3BKrm4NAwpwCPBLr/nSClQsLeEus7ekFK2cRUJV4vXAe2EG8ArYS L36ugLIFJX5MvscCMoZZQF1iypRciOnyEpvXvGWGOFNd4tFfXYgDjCTaGyYyQ5SISOx78Y4R 5GIJgUfsEtPufGeEWCUg8W3yIRaIXlmJTQeYIcEgKXFwxQ2WCYwSs5AsnoWweBaSxbOQbFjA yLKKUTS1ILmgOCm9yFivODG3uDQvXS85P3cTIyRW+3cw3j1gfYgxGWj7RGYp0eR8YKznlcQb GpsZWZiamBobmVuakSasJM57/2FSkJBAemJJanZqakFqUXxRaU5q8SFGJg5OqQbGRfH7LzCv PFJ3oPo+68YYuW/LRe495m+Llg7o/vY1btOj+et5Tc/dWunXkHPrhdjvFZ827zJemWhkdDah Omn5XPnag4ZPHv7f0us4x173tvSp9d+OhK6JUdx91tbx0dM79zbOkHGZVc3x/ca75Z/MxOf8 +RLBl+fHuLC85UfDXsf8+qRvxgv2blNiKc5INNRiLipOBAAZG8xK6wIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrKKsWRmVeSWpSXmKPExsVy+t9jAd3lu4yCDVa+07J4MG8bm8WEy9sZ LW78amO16F1wlc3iyP9+RosZ5/cxWRxfG+7A7nHn2h42jxuvFjJ59G1ZxejxeZNcAEtUA6NN RmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGuoaWFuZJCXmJuqq2Si0+ArltmDtAFSgpliTml QKGAxOJiJX07TBNCQ9x0LWAaI3R9Q4LgeowM0EDCOsaMWzP3Mhf89qnYN30dewPjU7suRg4O CQETiS1LFLsYOYFMMYkL99azdTFycQgJLGKUOHv0LguE84dRYsLipywgVWwCWhJ/37xhBrFF BBwk3l2/wARiMwucYJSYt9gYZKiQALfE6uYgkDCnAI/Euj+dYOXCAt4Sa3t6wcpZBFQlXi+c xwhi8wrYSrz4uQLKFpT4MfkeC8gYZgF1iSlTciGmy0tsXvOWGeJkdYlHf3UhDjCSaG+YyAxR IiKx78U7xgmMQrOQDJqFMGgWkkGzkHQsYGRZxSiaWpBcUJyUnmukV5yYW1yal66XnJ+7iRGc CJ5J72Bc1WBxiFGAg1GJh9eizzBYiDWxrLgy9xCjBAezkgjvjrVGwUK8KYmVValF+fFFpTmp xYcYk4HenMgsJZqcD0xSeSXxhsYmZkaWRmYWRibm5qQJK4nzHmy1DhQSSE8sSc1OTS1ILYLZ wsTBKdXA6CDybK/Fxa2SXo7NsrUn7I/cS7zNy/C+5m7g3SSnRztszWYsaWK1iu9qiFF7EJDm 7LuIV+HRnWet7NNWmB1xb1eKVNmXUFdi2XtoonShcKStvOLrHh9RripX72Nvvj8uqWtZc/z/ 5x3fVQStYl6wh9Xe2ZUgsNUyJ25r+ibWqg9z9mbqVuxTYinOSDTUYi4qTgQAKfGsV0gDAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As dw-mshc-ciu-div is strongly close to timing property, it is merged with each timing property. Signed-off-by: Seungwon Jeon --- .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 12 +++++------- arch/arm/boot/dts/exynos4412-odroidx.dts | 5 ++--- arch/arm/boot/dts/exynos4412-origen.dts | 5 ++--- arch/arm/boot/dts/exynos4412-trats2.dts | 5 ++--- arch/arm/boot/dts/exynos5250-arndale.dts | 10 ++++------ arch/arm/boot/dts/exynos5250-cros-common.dtsi | 15 ++++++--------- arch/arm/boot/dts/exynos5250-smdk5250.dts | 10 ++++------ arch/arm/boot/dts/exynos5420-arndale-octa.dts | 10 ++++------ arch/arm/boot/dts/exynos5420-smdk5420.dts | 10 ++++------ 9 files changed, 33 insertions(+), 49 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt index 532b1d4..ca1914f 100644 --- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt @@ -19,10 +19,6 @@ Required Properties: - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420 specific extensions. -* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface - unit (ciu) clock. This property is applicable only for Exynos5 SoC's and - ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7. - * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value in transmit mode and CIU clock phase shift value in receive mode for single data rate mode operation. Refer notes below for the order of the cells and the @@ -38,6 +34,9 @@ Required Properties: The order of the cells should be - First Cell: CIU clock phase shift value for tx mode. - Second Cell: CIU clock phase shift value for rx mode. + - Thrid Cell: Specifies the divider value for the card interface + unit (ciu) clock. This property is applicable only for Exynos5 SoC's and + ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7. Valid values for SDR and DDR CIU clock timing for Exynos5250: - valid value for tx phase shift and rx phase shift is 0 to 7. @@ -73,9 +72,8 @@ Example: broken-cd; fifo-depth = <0x80>; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; slot@0 { reg = <0>; diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 9804fcb..99f32db 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -48,9 +48,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 0>; + samsung,dw-mshc-ddr-timing = <1 2 0>; slot@0 { reg = <0>; diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 6bc0539..7c0b535 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -131,9 +131,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 0>; + samsung,dw-mshc-ddr-timing = <1 2 0>; slot@0 { reg = <0>; diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 4f851cc..556e414 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -451,9 +451,8 @@ card-detect-delay = <200>; vmmc-supply = <&vemmc_reg>; clock-frequency = <400000000>; - samsung,dw-mshc-ciu-div = <0>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 0>; + samsung,dw-mshc-ddr-timing = <1 2 0>; pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; pinctrl-names = "default"; status = "okay"; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index b42e658..dc53b51 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -376,9 +376,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; vmmc-supply = <&mmc_reg>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; @@ -394,9 +393,8 @@ num-slots = <1>; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; vmmc-supply = <&mmc_reg>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; diff --git a/arch/arm/boot/dts/exynos5250-cros-common.dtsi b/arch/arm/boot/dts/exynos5250-cros-common.dtsi index 2c1560d..d550261 100644 --- a/arch/arm/boot/dts/exynos5250-cros-common.dtsi +++ b/arch/arm/boot/dts/exynos5250-cros-common.dtsi @@ -251,9 +251,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>; @@ -267,9 +266,8 @@ num-slots = <1>; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; @@ -285,9 +283,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; /* See board-specific dts files for pin setup */ slot@0 { diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 3e69837..a59a1ae 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -134,9 +134,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; @@ -151,9 +150,8 @@ num-slots = <1>; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 7340745..ce2a50f 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -36,9 +36,8 @@ broken-cd; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <0 4>; - samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-sdr-timing = <0 4 3>; + samsung,dw-mshc-ddr-timing = <0 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; @@ -52,9 +51,8 @@ status = "okay"; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index fb5a1e2..3ad4ef3 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -36,9 +36,8 @@ broken-cd; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <0 4>; - samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-sdr-timing = <0 4 3>; + samsung,dw-mshc-ddr-timing = <0 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; @@ -52,9 +51,8 @@ status = "okay"; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;