From patchwork Fri Aug 30 15:13:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seungwon Jeon X-Patchwork-Id: 2852122 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9D8569F2F4 for ; Fri, 30 Aug 2013 15:14:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E60752018D for ; Fri, 30 Aug 2013 15:13:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 979E520182 for ; Fri, 30 Aug 2013 15:13:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756563Ab3H3PN5 (ORCPT ); Fri, 30 Aug 2013 11:13:57 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:20278 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756321Ab3H3PN4 (ORCPT ); Fri, 30 Aug 2013 11:13:56 -0400 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MSC00HI7NN7WSA0@mailout4.samsung.com> for linux-mmc@vger.kernel.org; Sat, 31 Aug 2013 00:13:55 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [203.254.230.51]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 67.2D.29948.3B6B0225; Sat, 31 Aug 2013 00:13:55 +0900 (KST) X-AuditID: cbfee691-b7f4a6d0000074fc-32-5220b6b30505 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 5B.61.09055.3B6B0225; Sat, 31 Aug 2013 00:13:55 +0900 (KST) Received: from DOTGIHJUN01 ([12.23.118.161]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MSC0010NNN7CA40@mmp1.samsung.com>; Sat, 31 Aug 2013 00:13:55 +0900 (KST) From: Seungwon Jeon To: linux-mmc@vger.kernel.org Cc: 'Chris Ball' , 'Jaehoon Chung' References: In-reply-to: Subject: [PATCH 16/22] mmc: dw_mmc: control card read threshold Date: Sat, 31 Aug 2013 00:13:55 +0900 Message-id: <001301cea593$8b01f560$a105e020$%jun@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac03z3aCvVFr8FaITt2vKVQKst76fw3OcIrwS9fJ1BAByUIdcA== Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrAIsWRmVeSWpSXmKPExsVy+t8zY93N2xSCDGafkbDY/nojm8WNX22s Fkf+9zM6MHscurKW0aNvyypGj8+b5AKYo7hsUlJzMstSi/TtErgyTn2+w1ywW7ri1seLjA2M q8S6GDk5JARMJLZN/cUOYYtJXLi3ng3EFhJYxijRdUcPpmbV1QNMXYxcQPFFjBLfTh1ihXD+ MEr8fvwZrINNQEvi75s3zCC2iICsxM8/F8DizALeEq/mr2HsYuQAauCWWN0cBBLmFOCRWPen E6xcWMBeYt2bXYwgNouAqkTbtkVgcV4BW4lP1x8zQtiCEj8m32MBGcMsoC4xZUouxHR5ic1r 3jKDhCWAwo/+6kIc4CRxtukgI0SJiMS+F+8YQS6WENjHLnFhw0V2iFUCEt8mH2KB6JWV2HSA GeJdSYmDK26wTGCUmIVk8SyExbOQLJ6FZMMCRpZVjKKpBckFxUnpRaZ6xYm5xaV56XrJ+bmb GCGxN3EH4/0D1ocYk4G2T2SWEk3OB8ZuXkm8obGZkYWpiamxkbmlGWnCSuK86i3WgUIC6Ykl qdmpqQWpRfFFpTmpxYcYmTg4pRoY6+QUq19ejBQ7/PrznJNx+f6c3VrK6+/9YJE/ErB+3puX TLf5Fm1OSvn/NtvMPFjwuv4uF/sn0XtV3wox3ZFqzJRyLZy8qGiv6NfP19eJtGmc6l210eAn Z5OKXj232DWHJa2K570qdjWnnDPTPrRHZN/mRQuu7Zdm9Xr9L+Z470LrBu9dh+c/VmIpzkg0 1GIuKk4EAOdnfcPTAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHKsWRmVeSWpSXmKPExsVy+t9jAd3N2xSCDG68ErHY/nojm8WNX22s Fkf+9zM6MHscurKW0aNvyypGj8+b5AKYoxoYbTJSE1NSixRS85LzUzLz0m2VvIPjneNNzQwM dQ0tLcyVFPISc1NtlVx8AnTdMnOANikplCXmlAKFAhKLi5X07TBNCA1x07WAaYzQ9Q0Jgusx MkADCesYM059vsNcsFu64tbHi4wNjKvEuhg5OSQETCRWXT3ABGGLSVy4t56ti5GLQ0hgEaPE t1OHWCGcP4wSvx9/ZgOpYhPQkvj75g0ziC0iICvx888FsDizgLfEq/lrGLsYOYAauCVWNweB hDkFeCTW/ekEKxcWsJdY92YXI4jNIqAq0bZtEVicV8BW4tP1x4wQtqDEj8n3WEDGMAuoS0yZ kgsxXV5i85q3zCBhCaDwo7+6EAc4SZxtOsgIUSIise/FO8YJjEKzkAyahTBoFpJBs5B0LGBk WcUomlqQXFCclJ5rqFecmFtcmpeul5yfu4kRHNvPpHYwrmywOMQowMGoxMObsFQhSIg1say4 MvcQowQHs5II78fFQCHelMTKqtSi/Pii0pzU4kOMyUBvTmSWEk3OB6advJJ4Q2MTMyNLIzML IxNzc9KElcR5D7RaBwoJpCeWpGanphakFsFsYeLglGpg3F3AE1Z+THnf9vB/P/51KE/eKCe7 av6zHr387Ul39k93OZZ09Et43Qv1qKnvq69P80xzLBB35Cy6+ujFyhT9fWE+pdueLT2fmnLm ZuOiaYE35QqCPi/qkkie4NGRnvs3rvJoXGyYL1OW7krjuXY2iUELzWdteRd0P2/6tge//BfX hbCxH1S4rMRSnJFoqMVcVJwIANfNwCoxAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Card Read Threshold should be ensured that the card clock does not stop in the middle of a block of data being transferred from the card to the Host. Specially, clock stop is allowed in fast transfer such as HS200 or SDR104 mode. And so, it should be enabled. Signed-off-by: Seungwon Jeon Tested-by: Alim Akhtar --- drivers/mmc/host/dw_mmc.c | 38 ++++++++++++++++++++++++++++++++++++-- drivers/mmc/host/dw_mmc.h | 3 +++ include/linux/mmc/dw_mmc.h | 1 + 3 files changed, 40 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index ac4abf9..23c4c3c 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -570,6 +570,37 @@ done: #endif } +static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data) +{ + unsigned int blksz = data->blksz; + u32 blksz_depth, fifo_depth; + u16 thld_size; + + WARN_ON(!(data->flags & MMC_DATA_READ)); + + if (host->timing != MMC_TIMING_MMC_HS200 && + host->timing != MMC_TIMING_UHS_SDR104) + goto disable; + + blksz_depth = blksz / (1 << host->data_shift); + fifo_depth = host->fifo_depth; + + if (blksz_depth > fifo_depth) + goto disable; + + /* + * If (blksz_depth) >= (fifo_depth >> 1), should be 'thld_size <= blksz' + * If (blksz_depth) < (fifo_depth >> 1), should be thld_size = blksz + * Currently just choose blksz. + */ + thld_size = blksz; + mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(thld_size, 1)); + return; + +disable: + mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(0, 0)); +} + static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) { int sg_len; @@ -627,10 +658,12 @@ static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) host->sg = NULL; host->data = data; - if (data->flags & MMC_DATA_READ) + if (data->flags & MMC_DATA_READ) { host->dir_status = DW_MCI_RECV_STATUS; - else + dw_mci_ctrl_rd_thld(host, data); + } else { host->dir_status = DW_MCI_SEND_STATUS; + } if (dw_mci_submit_data_dma(host, data)) { int flags = SG_MITER_ATOMIC; @@ -877,6 +910,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) regs &= ~((0x1 << slot->id) << 16); mci_writel(slot->host, UHS_REG, regs); + slot->host->timing = ios->timing; /* * Use mirror of ios->clock to prevent race with mmc diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h index a0f2f8d..6bf24ab 100644 --- a/drivers/mmc/host/dw_mmc.h +++ b/drivers/mmc/host/dw_mmc.h @@ -53,6 +53,7 @@ #define SDMMC_IDINTEN 0x090 #define SDMMC_DSCADDR 0x094 #define SDMMC_BUFADDR 0x098 +#define SDMMC_CDTHRCTL 0x100 #define SDMMC_DATA(x) (x) /* @@ -146,6 +147,8 @@ #define SDMMC_IDMAC_SWRESET BIT(0) /* Version ID register define */ #define SDMMC_GET_VERID(x) ((x) & 0xFFFF) +/* Card read threshold */ +#define SDMMC_SET_RD_THLD(v, x) (((v) & 0x1FFF) << 16 | (x)) /* Register access macros */ #define mci_readl(dev, reg) \ diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h index 4ec9dcc..a829f7e 100644 --- a/include/linux/mmc/dw_mmc.h +++ b/include/linux/mmc/dw_mmc.h @@ -130,6 +130,7 @@ struct dw_mci { struct mmc_command *cmd; struct mmc_data *data; unsigned int prev_blksz; + unsigned char timing; struct workqueue_struct *card_workqueue; /* DMA interface members*/