From patchwork Fri Aug 30 15:14:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seungwon Jeon X-Patchwork-Id: 2852126 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 38605C0AB5 for ; Fri, 30 Aug 2013 15:14:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6B6FE2018D for ; Fri, 30 Aug 2013 15:14:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 02E6520182 for ; Fri, 30 Aug 2013 15:14:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756321Ab3H3POZ (ORCPT ); Fri, 30 Aug 2013 11:14:25 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:46391 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755163Ab3H3POY (ORCPT ); Fri, 30 Aug 2013 11:14:24 -0400 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MSC000AYNNZFUP0@mailout3.samsung.com> for linux-mmc@vger.kernel.org; Sat, 31 Aug 2013 00:14:23 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [203.254.230.51]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id A1.E1.17682.FC6B0225; Sat, 31 Aug 2013 00:14:23 +0900 (KST) X-AuditID: cbfee68e-b7f756d000004512-4d-5220b6cf3c36 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id D0.71.09055.FC6B0225; Sat, 31 Aug 2013 00:14:23 +0900 (KST) Received: from DOTGIHJUN01 ([12.23.118.161]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MSC001M4NNZYA10@mmp1.samsung.com>; Sat, 31 Aug 2013 00:14:23 +0900 (KST) From: Seungwon Jeon To: linux-mmc@vger.kernel.org Cc: 'Chris Ball' , 'Jaehoon Chung' References: In-reply-to: Subject: [PATCH 20/22] mmc: dw_mmc: gather each reset code into functions Date: Sat, 31 Aug 2013 00:14:23 +0900 Message-id: <001701cea593$9be22df0$d3a689d0$%jun@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac03z3aCvVFr8FaITt2vKVQKst76fw3OcIrwS9fJ1BAByUIdcA== Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrIIsWRmVeSWpSXmKPExsVy+t8zY93z2xSCDBb91rbY/nojm8WNX22s Fkf+9zM6MHscurKW0aNvyypGj8+b5AKYo7hsUlJzMstSi/TtErgyVvdNYyzYqFnR/nI3SwPj ZYUuRk4OCQETiZl3TzND2GISF+6tZ+ti5OIQEljGKHH0xlUWmKLnczaxQCQWMUpMe30MquoP o8TTB/NZQarYBLQk/r55AzZKREBW4uefC2wgNrOAt8Sr+WsYuxg5gBq4JVY3B4GEOQV4JNb9 6QQrFxbwlHh+ezXYMhYBVYkt19czgti8ArYSfcu+MUPYghI/Jt9jARnDLKAuMWVKLsR0eYnN a94yg4QlgMKP/upCHOAkcbbpICNEiYjEvhfvGEEulhDYxy7xe+ZLNohVAhLfJh9igeiVldh0 ABoOkhIHV9xgmcAoMQvJ4lkIi2chWTwLyYYFjCyrGEVTC5ILipPSi4z0ihNzi0vz0vWS83M3 MUKir28H480D1ocYk4G2T2SWEk3OB0ZvXkm8obGZkYWpiamxkbmlGWnCSuK8ai3WgUIC6Ykl qdmpqQWpRfFFpTmpxYcYmTg4pRoYyx7dVy0UT77fErPqwI1Im5hJa3pX1Jinxwi8nfy3aWNU kfnkhK/H/ux895Qhgb/j+I+DCXf9whQ3v5tqJ3r4qrrYKV+3TTIWU+3OGac2MV1dZajlX7cq 49hM6fJZ/IprH/SsOXrG7rdpyeNXAYfnScZ/3NQuuHv1JZ5nt9df1jFtyZ4Ry54kq8RSnJFo qMVcVJwIACLYcsnUAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHKsWRmVeSWpSXmKPExsVy+t9jAd3z2xSCDG48VbfY/nojm8WNX22s Fkf+9zM6MHscurKW0aNvyypGj8+b5AKYoxoYbTJSE1NSixRS85LzUzLz0m2VvIPjneNNzQwM dQ0tLcyVFPISc1NtlVx8AnTdMnOANikplCXmlAKFAhKLi5X07TBNCA1x07WAaYzQ9Q0Jgusx MkADCesYM1b3TWMs2KhZ0f5yN0sD42WFLkZODgkBE4nnczaxQNhiEhfurWfrYuTiEBJYxCgx 7fUxKOcPo8TTB/NZQarYBLQk/r55wwxiiwjISvz8c4ENxGYW8JZ4NX8NYxcjB1ADt8Tq5iCQ MKcAj8S6P51g5cICnhLPb68GW8YioCqx5fp6RhCbV8BWom/ZN2YIW1Dix+R7LCBjmAXUJaZM yYWYLi+xec1bZpCwBFD40V9diAOcJM42HWSEKBGR2PfiHeMERqFZSAbNQhg0C8mgWUg6FjCy rGIUTS1ILihOSs811CtOzC0uzUvXS87P3cQIju1nUjsYVzZYHGIU4GBU4uFNWKoQJMSaWFZc mXuIUYKDWUmE9+NioBBvSmJlVWpRfnxRaU5q8SHGZKA3JzJLiSbnA9NOXkm8obGJmZGlkZmF kYm5OWnCSuK8B1qtA4UE0hNLUrNTUwtSi2C2MHFwSjUwRry5d2nV70fKlzm364uktXjmsMsu WbX1x9Tonb8Pr0tjqbz7u8iJX/HA1hC2Z2ceB/84F60ulvxF5+/nPD3j+507V8nKHtm5N2Te hfUCkb1Xdj9+dPTwweL5zdMlXP7MrDGotDFm/RS7UFdkmrrgJ98mIXWNJ4YJ25jLv61l5S9q LVS7cNvFSYmlOCPRUIu5qDgRAKfm0iExAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There are three resets in CTRL register. FIFO reset is especially used in several points with the same routine. It could be replaced with one function and the others may be applied similarly if needed. So, mci_wait_reset() is modified to allow various bit field of reset Signed-off-by: Seungwon Jeon Tested-by: Alim Akhtar --- drivers/mmc/host/dw_mmc.c | 81 ++++++++++++++++++++++++--------------------- 1 files changed, 43 insertions(+), 38 deletions(-) diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 334ee04..b34573c 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -110,6 +110,9 @@ static const u8 tuning_blk_pattern_8bit[] = { 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, }; +static inline bool dw_mci_fifo_reset(struct dw_mci *host); +static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host); + #if defined(CONFIG_DEBUG_FS) static int dw_mci_req_show(struct seq_file *s, void *v) { @@ -1200,7 +1203,7 @@ static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data) { - u32 status = host->data_status, ctrl; + u32 status = host->data_status; if (status & DW_MCI_DATA_ERROR_FLAGS) { if (status & SDMMC_INT_DRTO) { @@ -1230,15 +1233,9 @@ static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data) /* * After an error, there may be data lingering - * in the FIFO, so reset it - doing so - * generates a block interrupt, hence setting - * the scatter-gather pointer to NULL. + * in the FIFO */ - sg_miter_stop(&host->sg_miter); - host->sg = NULL; - ctrl = mci_readl(host, CTRL); - ctrl |= SDMMC_CTRL_FIFO_RESET; - mci_writel(host, CTRL, ctrl); + dw_mci_fifo_reset(host); } else { data->bytes_xfered = data->blocks * data->blksz; data->error = 0; @@ -1255,7 +1252,6 @@ static void dw_mci_tasklet_func(unsigned long priv) struct mmc_request *mrq; enum dw_mci_state state; enum dw_mci_state prev_state; - u32 ctrl; unsigned int err; spin_lock(&host->lock); @@ -1355,13 +1351,8 @@ static void dw_mci_tasklet_func(unsigned long priv) break; /* CMD error in data command */ - if (mrq->cmd->error && mrq->data) { - sg_miter_stop(&host->sg_miter); - host->sg = NULL; - ctrl = mci_readl(host, CTRL); - ctrl |= SDMMC_CTRL_FIFO_RESET; - mci_writel(host, CTRL, ctrl); - } + if (mrq->cmd->error && mrq->data) + dw_mci_fifo_reset(host); host->cmd = NULL; host->data = NULL; @@ -1980,18 +1971,8 @@ static void dw_mci_work_routine_card(struct work_struct *work) if (present == 0) { clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); - /* - * Clear down the FIFO - doing so generates a - * block interrupt, hence setting the - * scatter-gather pointer to NULL. - */ - sg_miter_stop(&host->sg_miter); - host->sg = NULL; - - ctrl = mci_readl(host, CTRL); - ctrl |= SDMMC_CTRL_FIFO_RESET; - mci_writel(host, CTRL, ctrl); - + /* Clear down the FIFO */ + dw_mci_fifo_reset(host); #ifdef CONFIG_MMC_DW_IDMAC ctrl = mci_readl(host, BMOD); /* Software reset of DMA */ @@ -2289,27 +2270,51 @@ no_dma: return; } -static bool mci_wait_reset(struct device *dev, struct dw_mci *host) +static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset) { unsigned long timeout = jiffies + msecs_to_jiffies(500); - unsigned int ctrl; + u32 ctrl; - mci_writel(host, CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | - SDMMC_CTRL_DMA_RESET)); + ctrl = mci_readl(host, CTRL); + ctrl |= reset; + mci_writel(host, CTRL, ctrl); /* wait till resets clear */ do { ctrl = mci_readl(host, CTRL); - if (!(ctrl & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | - SDMMC_CTRL_DMA_RESET))) + if (!(ctrl & reset)) return true; } while (time_before(jiffies, timeout)); - dev_err(dev, "Timeout resetting block (ctrl %#x)\n", ctrl); + dev_err(host->dev, + "Timeout resetting block (ctrl reset %#x)\n", + ctrl & reset); return false; } +static inline bool dw_mci_fifo_reset(struct dw_mci *host) +{ + /* + * Reseting generates a block interrupt, hence setting + * the scatter-gather pointer to NULL. + */ + if (host->sg) { + sg_miter_stop(&host->sg_miter); + host->sg = NULL; + } + + return dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET); +} + +static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host) +{ + return dw_mci_ctrl_reset(host, + SDMMC_CTRL_FIFO_RESET | + SDMMC_CTRL_RESET | + SDMMC_CTRL_DMA_RESET); +} + #ifdef CONFIG_OF static struct dw_mci_of_quirks { char *quirk; @@ -2517,7 +2522,7 @@ int dw_mci_probe(struct dw_mci *host) } /* Reset all blocks */ - if (!mci_wait_reset(host->dev, host)) + if (!dw_mci_ctrl_all_reset(host)) return -ENODEV; host->dma_ops = host->pdata->dma_ops; @@ -2723,7 +2728,7 @@ int dw_mci_resume(struct dw_mci *host) } } - if (!mci_wait_reset(host->dev, host)) { + if (!dw_mci_ctrl_all_reset(host)) { ret = -ENODEV; return ret; }