From patchwork Wed Jan 15 14:11:56 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seungwon Jeon X-Patchwork-Id: 3491981 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DA0ADC02DC for ; Wed, 15 Jan 2014 14:12:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CCD3E20145 for ; Wed, 15 Jan 2014 14:12:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B099F20122 for ; Wed, 15 Jan 2014 14:12:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752090AbaAOOMD (ORCPT ); Wed, 15 Jan 2014 09:12:03 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:57202 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752089AbaAOOL7 (ORCPT ); Wed, 15 Jan 2014 09:11:59 -0500 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MZG007974RYN860@mailout2.samsung.com> for linux-mmc@vger.kernel.org; Wed, 15 Jan 2014 23:11:58 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [203.254.230.50]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 99.BA.14803.C2796D25; Wed, 15 Jan 2014 23:11:56 +0900 (KST) X-AuditID: cbfee691-b7efc6d0000039d3-a4-52d6972c5634 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id CA.D4.28157.C2796D25; Wed, 15 Jan 2014 23:11:56 +0900 (KST) Received: from DOTGIHJUN01 ([12.23.118.161]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MZG00C2N4RWQ1A0@mmp2.samsung.com>; Wed, 15 Jan 2014 23:11:56 +0900 (KST) From: Seungwon Jeon To: 'Chris Ball' , 'Balaji T K' Cc: linux-mmc@vger.kernel.org References: <1383653403-10049-1-git-send-email-ulf.hansson@linaro.org> In-reply-to: Subject: [PATCH 3/7] mmc: omap: clarify DDR timing mode between SD-UHS and eMMC Date: Wed, 15 Jan 2014 23:11:56 +0900 Message-id: <002101cf11fb$bf5c6280$3e152780$%jun@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac7aH/uUm1J6MxFOSyaXb4Fx/nx/rAABnFmgDfJZ22A= Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrAIsWRmVeSWpSXmKPExsVy+t8zI12d6deCDLa9FrSYOnk7m8WEy9sZ LY7872d0YPa48Wohk8fxG9uZPD5vkgtgjuKySUnNySxLLdK3S+DK+DJjJ1PBFs6Ki9fvszcw 3mPvYuTkkBAwkZiz9iEbhC0mceHeeiCbi0NIYBmjxIuFi9lgij7vuscMkZjOKLHh8ARmkISQ wB9Gie3n6kBsNgEtib9v3oDFRQScJfYsW8kKYjMLyEpc3H+VEaLeTeJJzxKwoZwCPBLr/nSC 1QsL+EssfHcd7CIWAVWJx39fg8V5BWwlll45xgZhC0r8mHyPpYuRA2imusSUKbkQ4+UlNq95 ywwSlgAKP/qrC2KKCFhJdM00hKgQkdj34h0jyPUSAvvYJZY/3Qy1SUDi2+RDLBCtshKbDjBD fCspcXDFDZYJjBKzkOydhbB3FpK9s5BsWMDIsopRNLUguaA4Kb3IVK84Mbe4NC9dLzk/dxMj JPYm7mC8f8D6EGMy0PaJzFKiyfnA2M0riTc0NjOyMDUxNTYytzQjTVhJnDf9UVKQkEB6Yklq dmpqQWpRfFFpTmrxIUYmDk6pBsbpzDIrOje8+L4l5bClzwVLUfm4XVO+JxodtWgSYXx2WT9M 61jEmrCFfDPyzm4Kfyb+JUnnYi/TtjOGEY6XV73ROO7ufpT/S2rwMQad91rXHmzZsGJCx419 r6e4hX7cs/HZx8JExxPlqbuuFk+p7rhfvLQtclPcPeb58Y7cJbd6uoTVH0QqTvNTYinOSDTU Yi4qTgQANljtoNMCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprLKsWRmVeSWpSXmKPExsVy+t9jQV2d6deCDF7N4rOYOnk7m8WEy9sZ LY7872d0YPa48Wohk8fxG9uZPD5vkgtgjmpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw 1DW0tDBXUshLzE21VXLxCdB1y8wB2qSkUJaYUwoUCkgsLlbSt8M0ITTETdcCpjFC1zckCK7H yAANJKxjzPgyYydTwRbOiovX77M3MN5j72Lk5JAQMJH4vOseM4QtJnHh3nq2LkYuDiGB6YwS Gw5PAEsICfxhlNh+rg7EZhPQkvj75g1YXETAWWLPspWsIDazgKzExf1XGSHq3SSe9CxhA7E5 BXgk1v3pBKsXFvCXWPjuOthiFgFVicd/X4PFeQVsJZZeOcYGYQtK/Jh8j6WLkQNoprrElCm5 EOPlJTavecsMEpYACj/6qwtiighYSXTNNISoEJHY9+Id4wRGoVlI5sxCmDMLyZxZSDoWMLKs YhRNLUguKE5KzzXSK07MLS7NS9dLzs/dxAiO7GfSOxhXNVgcYhTgYFTi4f0RfjVIiDWxrLgy 9xCjBAezkgivZu61ICHelMTKqtSi/Pii0pzU4kOMyUBfTmSWEk3OByadvJJ4Q2MTMyNLIzML IxNzc9KElcR5D7ZaBwoJpCeWpGanphakFsFsYeLglGpgzHAW8o+NjuRZJclediW07HQfj/uG Jblu780DS5MMHm5jTSoNT5Z+mmri/9q/RHpbxoxFW24ttFyvdc2wzMKVjVF6eWn2ox+tVWVX 7ESW57Ek68f0Pjs/O/9cb3hji4FN960bc+4yfci5+byLRUTAX7k6bDf/mZm3WflLmbw1z0/+ s7X8/EMlluKMREMt5qLiRACB42Z1MAMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Replaced UHS_DDR50 with MMC_DDR52. CC: Balaji T K Signed-off-by: Seungwon Jeon Acked-by: Balaji T K --- drivers/mmc/host/omap_hsmmc.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index dbd32ad..cca397e 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -540,7 +540,7 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host) * - MMC/SD clock coming out of controller > 25MHz */ if ((mmc_slot(host).features & HSMMC_HAS_HSPE_SUPPORT) && - (ios->timing != MMC_TIMING_UHS_DDR50) && + (ios->timing != MMC_TIMING_MMC_DDR52) && ((OMAP_HSMMC_READ(host->base, CAPA) & HSS) == HSS)) { regval = OMAP_HSMMC_READ(host->base, HCTL); if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000) @@ -560,7 +560,7 @@ static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host) u32 con; con = OMAP_HSMMC_READ(host->base, CON); - if (ios->timing == MMC_TIMING_UHS_DDR50) + if (ios->timing == MMC_TIMING_MMC_DDR52) con |= DDR; /* configure in DDR mode */ else con &= ~DDR;