diff mbox

[4/7] mmc: sh_mmcif: clarify DDR timing mode between SD-UHS and eMMC

Message ID 002201cf11fb$c63ffee0$52bffca0$%jun@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Seungwon Jeon Jan. 15, 2014, 2:12 p.m. UTC
Replaced UHS_DDR50 with MMC_DDR52.

CC: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
---
 drivers/mmc/host/sh_mmcif.c |    9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)

Comments

Ulf Hansson Jan. 16, 2014, 10:22 a.m. UTC | #1
On 15 January 2014 15:12, Seungwon Jeon <tgih.jun@samsung.com> wrote:
> Replaced UHS_DDR50 with MMC_DDR52.
>
> CC: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
> ---
>  drivers/mmc/host/sh_mmcif.c |    9 +++++----
>  1 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
> index 54730f4..656fbba 100644
> --- a/drivers/mmc/host/sh_mmcif.c
> +++ b/drivers/mmc/host/sh_mmcif.c
> @@ -803,12 +803,13 @@ static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,
>                         break;
>                 }
>                 switch (host->timing) {
> -               case MMC_TIMING_UHS_DDR50:
> +               case MMC_TIMING_MMC_DDR52:

What about UHS SD cards?

Kind regards
Ulf Hansson

>                         /*
>                          * MMC core will only set this timing, if the host
> -                        * advertises the MMC_CAP_UHS_DDR50 capability. MMCIF
> -                        * implementations with this capability, e.g. sh73a0,
> -                        * will have to set it in their platform data.
> +                        * advertises the MMC_CAP_1_8V_DDR/MMC_CAP_1_2V_DDR
> +                        * capability. MMCIF implementations with this
> +                        * capability, e.g. sh73a0, will have to set it
> +                        * in their platform data.
>                          */
>                         tmp |= CMD_SET_DARS;
>                         break;
> --
> 1.7.0.4
>
>
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Seungwon Jeon Jan. 17, 2014, 2:36 p.m. UTC | #2
On Thu, January 16, 2014, Ulf Hansson wrote:
> On 15 January 2014 15:12, Seungwon Jeon <tgih.jun@samsung.com> wrote:
> > Replaced UHS_DDR50 with MMC_DDR52.
> >
> > CC: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> > Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
> > ---
> >  drivers/mmc/host/sh_mmcif.c |    9 +++++----
> >  1 files changed, 5 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
> > index 54730f4..656fbba 100644
> > --- a/drivers/mmc/host/sh_mmcif.c
> > +++ b/drivers/mmc/host/sh_mmcif.c
> > @@ -803,12 +803,13 @@ static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,
> >                         break;
> >                 }
> >                 switch (host->timing) {
> > -               case MMC_TIMING_UHS_DDR50:
> > +               case MMC_TIMING_MMC_DDR52:
> 
> What about UHS SD cards?
I guess that there is no implementation related to voltage switch for UHS support.
MMC_TIMING_UHS_DDR50 looks like pointing eMMC's DDR.

Guennadi,
Can you check this more?

Thanks,
Seungwon Jeon

> 
> Kind regards
> Ulf Hansson
> 
> >                         /*
> >                          * MMC core will only set this timing, if the host
> > -                        * advertises the MMC_CAP_UHS_DDR50 capability. MMCIF
> > -                        * implementations with this capability, e.g. sh73a0,
> > -                        * will have to set it in their platform data.
> > +                        * advertises the MMC_CAP_1_8V_DDR/MMC_CAP_1_2V_DDR
> > +                        * capability. MMCIF implementations with this
> > +                        * capability, e.g. sh73a0, will have to set it
> > +                        * in their platform data.
> >                          */
> >                         tmp |= CMD_SET_DARS;
> >                         break;
> > --
> > 1.7.0.4
> >
> >
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majordomo@vger.kernel.org
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Seungwon Jeon Jan. 28, 2014, 1:08 p.m. UTC | #3
Hi Guennadi,

Do you have any idea for this change?
Could you check?

Thanks,
Seungwon Jeon

On Fri, January 17, 2014, Seungwon Jeon wrote:
> On Thu, January 16, 2014, Ulf Hansson wrote:
> > On 15 January 2014 15:12, Seungwon Jeon <tgih.jun@samsung.com> wrote:
> > > Replaced UHS_DDR50 with MMC_DDR52.
> > >
> > > CC: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> > > Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
> > > ---
> > >  drivers/mmc/host/sh_mmcif.c |    9 +++++----
> > >  1 files changed, 5 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
> > > index 54730f4..656fbba 100644
> > > --- a/drivers/mmc/host/sh_mmcif.c
> > > +++ b/drivers/mmc/host/sh_mmcif.c
> > > @@ -803,12 +803,13 @@ static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,
> > >                         break;
> > >                 }
> > >                 switch (host->timing) {
> > > -               case MMC_TIMING_UHS_DDR50:
> > > +               case MMC_TIMING_MMC_DDR52:
> >
> > What about UHS SD cards?
> I guess that there is no implementation related to voltage switch for UHS support.
> MMC_TIMING_UHS_DDR50 looks like pointing eMMC's DDR.
> 
> Guennadi,
> Can you check this more?
> 
> Thanks,
> Seungwon Jeon
> 
> >
> > Kind regards
> > Ulf Hansson
> >
> > >                         /*
> > >                          * MMC core will only set this timing, if the host
> > > -                        * advertises the MMC_CAP_UHS_DDR50 capability. MMCIF
> > > -                        * implementations with this capability, e.g. sh73a0,
> > > -                        * will have to set it in their platform data.
> > > +                        * advertises the MMC_CAP_1_8V_DDR/MMC_CAP_1_2V_DDR
> > > +                        * capability. MMCIF implementations with this
> > > +                        * capability, e.g. sh73a0, will have to set it
> > > +                        * in their platform data.
> > >                          */
> > >                         tmp |= CMD_SET_DARS;
> > >                         break;
> > > --
> > > 1.7.0.4
> > >
> > >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html

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diff mbox

Patch

diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
index 54730f4..656fbba 100644
--- a/drivers/mmc/host/sh_mmcif.c
+++ b/drivers/mmc/host/sh_mmcif.c
@@ -803,12 +803,13 @@  static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,
 			break;
 		}
 		switch (host->timing) {
-		case MMC_TIMING_UHS_DDR50:
+		case MMC_TIMING_MMC_DDR52:
 			/*
 			 * MMC core will only set this timing, if the host
-			 * advertises the MMC_CAP_UHS_DDR50 capability. MMCIF
-			 * implementations with this capability, e.g. sh73a0,
-			 * will have to set it in their platform data.
+			 * advertises the MMC_CAP_1_8V_DDR/MMC_CAP_1_2V_DDR
+			 * capability. MMCIF implementations with this
+			 * capability, e.g. sh73a0, will have to set it
+			 * in their platform data.
 			 */
 			tmp |= CMD_SET_DARS;
 			break;