From patchwork Fri Mar 7 13:30:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seungwon Jeon X-Patchwork-Id: 3791381 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9BDC89F369 for ; Fri, 7 Mar 2014 13:30:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 981E8201F0 for ; Fri, 7 Mar 2014 13:30:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5145220154 for ; Fri, 7 Mar 2014 13:30:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753371AbaCGNar (ORCPT ); Fri, 7 Mar 2014 08:30:47 -0500 Received: from mailout1.samsung.com ([203.254.224.24]:47800 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753186AbaCGNar (ORCPT ); Fri, 7 Mar 2014 08:30:47 -0500 Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N22007QOIV95M40@mailout1.samsung.com> for linux-mmc@vger.kernel.org; Fri, 07 Mar 2014 22:30:45 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [203.254.230.49]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id F4.8C.10364.50AC9135; Fri, 07 Mar 2014 22:30:45 +0900 (KST) X-AuditID: cbfee690-b7f266d00000287c-e8-5319ca0523e1 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id F3.6C.28157.50AC9135; Fri, 07 Mar 2014 22:30:45 +0900 (KST) Received: from DOTGIHJUN01 ([12.36.185.168]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N220037RIV9VH50@mmp2.samsung.com>; Fri, 07 Mar 2014 22:30:45 +0900 (KST) From: Seungwon Jeon To: linux-mmc@vger.kernel.org Cc: 'Russell King' , 'Ulf Hansson' , 'Chris Ball' , 'Rickard Andersson' References: <1383653403-10049-1-git-send-email-ulf.hansson@linaro.org> <006101cf2a57$77859c00$6690d400$%jun@samsung.com> In-reply-to: <006101cf2a57$77859c00$6690d400$%jun@samsung.com> Subject: [PATCH v3 2/7] mmc: mmci: clarify DDR timing mode between SD-UHS and eMMC Date: Fri, 07 Mar 2014 22:30:45 +0900 Message-id: <002a01cf3a09$71cbebe0$5563c3a0$%jun@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac7aH/uUm1J6MxFOSyaXb4Fx/nx/rAABnFmgDfJZ22AGGWSuEAPsrUwg Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrEIsWRmVeSWpSXmKPExsVy+t8zQ13WU5LBBgum61lMuLyd0eLI/35G i9uXeS0W73nGaHF8bbgDq0dLcw+bx51re9g8brxayOTxfekado/Pm+QCWKO4bFJSczLLUov0 7RK4Mrrv/2MsuMNZcWX3fcYGxgkcXYwcHBICJhKbfql0MXICmWISF+6tZ+ti5OIQEljGKNG5 /wgjRMJEovFBAytEYjqjRP+5L0wQzh9Gie13brGBVLEJaEn8ffOGGcQWEZCV+PnnAtgoZoEN jBI/PjxgBUkICVRJXNv+Amwsp4CdxL4NTWwgZwgLhEgsOy8JEmYRUJU4uPUYWJhXwFaia2oQ SJhXQFDix+R7LCBhZgF1iSlTckHCzALyEpvXvGWG+EVd4tFfXYgD3CQOf3zACFEiIrHvxTtG kGMkBO6xS/xe8IoZYpOAxLfJh1ggemUlNh1ghnhXUuLgihssExglZiFZPAth8Swki2ch2bCA kWUVo2hqQXJBcVJ6kYlecWJucWleul5yfu4mRkh8TtjBeO+A9SHGZKDtE5mlRJPzgfGdVxJv aGxmZGFqYmpsZG5pRpqwkjiv2qOkICGB9MSS1OzU1ILUovii0pzU4kOMTBycUg2Mi4xN74ns vnSl8/mdBfGXX97+fXunw18WoWX/u0JP3GyyjTzi6LCsvjEzanP+RR4NWcNtdaefL6nT6/uu PGNVt4/1xrv8mz2fRJ2M1sx5JR7fyxJ07Wp17d1naY4ZUUxHrom4/vltcTkoTfjm7sxVBd0V xzO3c3DuOhxS3VB+LnLG7d9Vswo0lFiKMxINtZiLihMBNogSJOUCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrAKsWRmVeSWpSXmKPExsVy+t9jQV3WU5LBBl1XtCwmXN7OaHHkfz+j xe3LvBaL9zxjtDi+NtyB1aOluYfN4861PWweN14tZPL4vnQNu8fnTXIBrFENjDYZqYkpqUUK qXnJ+SmZeem2St7B8c7xpmYGhrqGlhbmSgp5ibmptkouPgG6bpk5QLuVFMoSc0qBQgGJxcVK +naYJoSGuOlawDRG6PqGBMH1GBmggYR1jBnd9/8xFtzhrLiy+z5jA+MEji5GTg4JAROJxgcN rBC2mMSFe+vZuhi5OIQEpjNK9J/7wgTh/GGU2H7nFhtIFZuAlsTfN2+YQWwRAVmJn38ugHUw C2xglPjx4QHYKCGBKolr218wgticAnYS+zY0ARVxcAgLhEgsOy8JEmYRUJU4uPUYWJhXwFai a2oQSJhXQFDix+R7LCBhZgF1iSlTckHCzALyEpvXvGUGCUsAhR/91YU4wE3i8McHjBAlIhL7 XrxjnMAoNAvJoFkIg2YhGTQLSccCRpZVjKKpBckFxUnpuUZ6xYm5xaV56XrJ+bmbGMHx/0x6 B+OqBotDjAIcjEo8vB2LJIKFWBPLiitzDzFKcDArifDyrJYMFuJNSaysSi3Kjy8qzUktPsSY DPTlRGYp0eR8YGrKK4k3NDYxM7I0MrMwMjE3J01YSZz3YKt1oJBAemJJanZqakFqEcwWJg5O qQbGloKou58OixV4aTowxzHXvYnSOLv4tr9lGoNbvLUe398XxtkZ9RP0p7JVZfv9XvHX08G5 dtP+4HIujcv6/LGbTlu/WidtuvJy//GdKuclX6albErpu+SZ/tLg8edWa/n78qtvzr7weIbM p905DR0nT3zqjma9qjnF79edkxuXN3P7WD7w5c5SYinOSDTUYi4qTgQAHGRoB0MDAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Added MMC_DDR52 as eMMC's DDR mode distinguished from SD-UHS. CC: Russell King Signed-off-by: Seungwon Jeon Acked-by: Ulf Hansson --- drivers/mmc/host/mmci.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 771c60a..7e85393 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -299,7 +299,8 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) clk |= MCI_ST_8BIT_BUS; - if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) + if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || + host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) clk |= MCI_ST_UX500_NEG_EDGE; mmci_write_clkreg(host, clk); @@ -784,7 +785,8 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) mmci_write_clkreg(host, clk); } - if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) + if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || + host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) datactrl |= MCI_ST_DPSM_DDRMODE; /*