From patchwork Fri Mar 14 12:11:56 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seungwon Jeon X-Patchwork-Id: 3832451 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4EE4CBF540 for ; Fri, 14 Mar 2014 12:12:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6A98020320 for ; Fri, 14 Mar 2014 12:12:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6274520306 for ; Fri, 14 Mar 2014 12:12:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753927AbaCNMMA (ORCPT ); Fri, 14 Mar 2014 08:12:00 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:44356 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753722AbaCNML7 (ORCPT ); Fri, 14 Mar 2014 08:11:59 -0400 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N2F00CAFDVX4300@mailout2.samsung.com> for linux-mmc@vger.kernel.org; Fri, 14 Mar 2014 21:11:57 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [203.254.230.51]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 26.A8.09028.D02F2235; Fri, 14 Mar 2014 21:11:57 +0900 (KST) X-AuditID: cbfee68e-b7f566d000002344-7b-5322f20da258 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 3D.AF.29263.C02F2235; Fri, 14 Mar 2014 21:11:56 +0900 (KST) Received: from DOTGIHJUN01 ([12.36.185.168]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N2F00J6KDVWW760@mmp2.samsung.com>; Fri, 14 Mar 2014 21:11:56 +0900 (KST) From: Seungwon Jeon To: linux-mmc@vger.kernel.org Cc: 'Chris Ball' , 'Ulf Hansson' References: <1383653403-10049-1-git-send-email-ulf.hansson@linaro.org> <006001cf2a57$73a07290$5ae157b0$%jun@samsung.com> In-reply-to: Subject: [PATCH RESEND v3 1/7] mmc: clarify DDR timing mode between SD-UHS and eMMC Date: Fri, 14 Mar 2014 21:11:56 +0900 Message-id: <003301cf3f7e$9821b9d0$c8652d70$%jun@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=UTF-8 Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac7aH/uUm1J6MxFOSyaXb4Fx/nx/rAABnFmgDfJZ22AGGVY+QAPsoLRAAVyiOxA= Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrIIsWRmVeSWpSXmKPExsVy+t8zY13eT0rBBrPPMVtMuLyd0eLI/35G i+Nrwx2YPe5c28PmcePVQiaPz5vkApijuGxSUnMyy1KL9O0SuDLWzqgp6OOrOPLzGFsD4y3u LkZODgkBE4k909tZIWwxiQv31rN1MXJxCAksY5RY9GApI0zR3c4D7BCJ6YwS10/9Z4Rw/jBK PN7cygZSxSagJfH3zRtmEFtEQFbi558LYHFmAW+JM5+ngMWFBKok5t09xQ5icwrwSKz70wkU 5+AQFgiVeP/FFyTMIqAqcXv+c7ByXgFbiQc/TzJB2IISPybfY4EYqS4xad4iZghbXmLzmrdg YySA4o/+6kJc4Cex78wJqHIRiX0v3oGdLCGwi13i4dtZ7BC7BCS+TT7EAtErK7HpADPEv5IS B1fcYJnAKDELyeZZSDbPQrJ5FpIVCxhZVjGKphYkFxQnpRcZ6RUn5haX5qXrJefnbmKERF/f DsabB6wPMSYDrZ/ILCWanA+M3rySeENjMyMLUxNTYyNzSzPShJXEeRc9TAoSEkhPLEnNTk0t SC2KLyrNSS0+xMjEwSnVwOh0hO1n3LmtX6qbEpuETH3Mwy4ssslQOh0n7vbT5MrbmYlTVU4f C+TvOvIgbflMvsB9mh+7/eWe7feY+Pa5VOIEvwk9sV/WRdSIuec71z5LTDIJP8Z5PY7xmvOv n9ciZv676VVbs4STRY9lasW11Cfae/4mS6kdFHMRuKfbs0mD4c5jRo6nLkosxRmJhlrMRcWJ ALXe3D/UAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHKsWRmVeSWpSXmKPExsVy+t9jQV2eT0rBBp9e2lhMuLyd0eLI/35G i+Nrwx2YPe5c28PmcePVQiaPz5vkApijGhhtMlITU1KLFFLzkvNTMvPSbZW8g+Od403NDAx1 DS0tzJUU8hJzU22VXHwCdN0yc4AWKSmUJeaUAoUCEouLlfTtME0IDXHTtYBpjND1DQmC6zEy QAMJ6xgz1s6oKejjqzjy8xhbA+Mt7i5GTg4JAROJu50H2CFsMYkL99azdTFycQgJTGeUuH7q PyOE84dR4vHmVjaQKjYBLYm/b94wg9giArISP/9cAIszC3hLnPk8BSwuJFAlMe/uKbCpnAI8 Euv+dALFOTiEBUIl3n/xBQmzCKhK3J7/HKycV8BW4sHPk0wQtqDEj8n3WCBGqktMmreIGcKW l9i85i3YGAmg+KO/uhAX+EnsO3MCqlxEYt+Ld4wTGIVmIZk0C8mkWUgmzULSsoCRZRWjaGpB ckFxUnquoV5xYm5xaV66XnJ+7iZGcGw/k9rBuLLB4hCjAAejEg+vw2HFYCHWxLLiytxDjBIc zEoivCcfKwUL8aYkVlalFuXHF5XmpBYfYkwGenQis5Rocj4w7eSVxBsam5gZWRqZWRiZmJuT Jqwkznug1TpQSCA9sSQ1OzW1ILUIZgsTB6dUA6O/mxrTs89yzVuD1u1Mshe2WSC3/Zyy2729 j8p+Rq4WUlnUsuaomzjzCoFSt7t/thlPaqhk3By9+3eadoCZc0q89HS9o5d6d5oU5fwU3Vmy pXVDRPOnNbdux2aVS5Y802Q9phZ2eK7L25+u2/lj0+t6g0/JruVsvpzMvumsJVP7RM15iv+C DimxFGckGmoxFxUnAgAPMdFbMQMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This change distinguishes DDR timing mode of current mixed usage to clarify device type. Signed-off-by: Seungwon Jeon Acked-by: Ulf Hansson Acked-by: Jaehoon Chung --- drivers/mmc/core/debugfs.c | 3 +++ drivers/mmc/core/mmc.c | 2 +- include/linux/mmc/host.h | 3 ++- 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c index 54829c0..509229b 100644 --- a/drivers/mmc/core/debugfs.c +++ b/drivers/mmc/core/debugfs.c @@ -135,6 +135,9 @@ static int mmc_ios_show(struct seq_file *s, void *data) case MMC_TIMING_UHS_DDR50: str = "sd uhs DDR50"; break; + case MMC_TIMING_MMC_DDR52: + str = "mmc DDR52"; + break; case MMC_TIMING_MMC_HS200: str = "mmc high-speed SDR200"; break; diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 1ab5f3a..e22d851 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -1264,7 +1264,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, goto err; } mmc_card_set_ddr_mode(card); - mmc_set_timing(card->host, MMC_TIMING_UHS_DDR50); + mmc_set_timing(card->host, MMC_TIMING_MMC_DDR52); mmc_set_bus_width(card->host, bus_width); } } diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index cb61ea4..3535420 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -58,7 +58,8 @@ struct mmc_ios { #define MMC_TIMING_UHS_SDR50 5 #define MMC_TIMING_UHS_SDR104 6 #define MMC_TIMING_UHS_DDR50 7 -#define MMC_TIMING_MMC_HS200 8 +#define MMC_TIMING_MMC_DDR52 8 +#define MMC_TIMING_MMC_HS200 9 #define MMC_SDR_MODE 0 #define MMC_1_2V_DDR_MODE 1