From patchwork Sat Feb 15 14:09:20 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seungwon Jeon X-Patchwork-Id: 3656451 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 521E5BF13A for ; Sat, 15 Feb 2014 14:09:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8C96720172 for ; Sat, 15 Feb 2014 14:09:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6B799201DE for ; Sat, 15 Feb 2014 14:09:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753249AbaBOOJV (ORCPT ); Sat, 15 Feb 2014 09:09:21 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:44280 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753046AbaBOOJU (ORCPT ); Sat, 15 Feb 2014 09:09:20 -0500 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N11005Z8JBJ9640@mailout2.samsung.com> for linux-mmc@vger.kernel.org; Sat, 15 Feb 2014 23:09:20 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [203.254.230.48]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 47.8B.10092.F057FF25; Sat, 15 Feb 2014 23:09:19 +0900 (KST) X-AuditID: cbfee68f-b7f156d00000276c-ad-52ff750febea Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id A0.5C.28157.F057FF25; Sat, 15 Feb 2014 23:09:19 +0900 (KST) Received: from DOTGIHJUN01 ([12.23.118.161]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N11001BHJBJ9P30@mmp2.samsung.com>; Sat, 15 Feb 2014 23:09:19 +0900 (KST) From: Seungwon Jeon To: linux-mmc@vger.kernel.org Cc: 'Chris Ball' , 'Wei WANG' , 'Samuel Ortiz' References: <1383653403-10049-1-git-send-email-ulf.hansson@linaro.org> In-reply-to: Subject: [PATCH v2 5/7] mmc: rtsx: clarify DDR timing mode between SD-UHS and eMMC Date: Sat, 15 Feb 2014 23:09:20 +0900 Message-id: <006401cf2a57$8525c4c0$8f714e40$%jun@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac7aH/uUm1J6MxFOSyaXb4Fx/nx/rAABnFmgDfJZ22AGGYiOQA== Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrFIsWRmVeSWpSXmKPExsVy+t8zA13+0v9BBk9uWVhMuLyd0eLI/35G i9PdrBYr151mc2DxmHcy0OPGq4VMHj82vGP0+LxJLoAlissmJTUnsyy1SN8ugSvj3IWXLAWL OSsW/VnB2MD4gr2LkZNDQsBE4tCrX4wQtpjEhXvr2boYuTiEBJYxSuxYvoYFpmhF+1RmiMR0 Rolpbx+yQjh/GCXaHv1hAqliE9CS+PvmDTOILSIgK/HzzwU2EJtZoFhiyZ6rYJOEBNwknvQs AYtzCvBIrPvTCVYvLBAisfPIBzCbRUBVovfcE7B6XgFbiY3Tr0DZghI/Jt8DsjmAZqpLTJmS CzFeXmLzmrfMIGEJoPCjv7oQFzhJNG1ewgxRIiKx78U7RpCTJQSOsUvs2t0OtUpA4tvkQywQ vbISmw4wQ/wrKXFwxQ2WCYwSs5AsnoWweBaSxbOQbFjAyLKKUTS1ILmgOCm9yFivODG3uDQv XS85P3cTIyQe+3cw3j1gfYgxGWj7RGYp0eR8YDznlcQbGpsZWZiamBobmVuakSasJM57/2FS kJBAemJJanZqakFqUXxRaU5q8SFGJg5OqQbGmb5NkjY+Rz8/U1mYO3m9mphe6Nsf4VtzyiU/ xGVet5+lfuY4V8fFx0JWrl73I/UaW76+mMEz+VcLx7LT94SvhQZvK+LnuxZ6jcmu4tvZlVra ijnSEh0/JuxtZP199Mr9I+xCCZmsCceY2P5PvbXAd+mS5YvX73zJzqLS1TD91Nr/+1K+ZQZv V2Ipzkg01GIuKk4EAD/htiDdAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOKsWRmVeSWpSXmKPExsVy+t9jQV3+0v9BBhcnmFpMuLyd0eLI/35G i9PdrBYr151mc2DxmHcy0OPGq4VMHj82vGP0+LxJLoAlqoHRJiM1MSW1SCE1Lzk/JTMv3VbJ OzjeOd7UzMBQ19DSwlxJIS8xN9VWycUnQNctMwdoo5JCWWJOKVAoILG4WEnfDtOE0BA3XQuY xghd35AguB4jAzSQsI4x49yFlywFizkrFv1ZwdjA+IK9i5GTQ0LARGJF+1RmCFtM4sK99Wxd jFwcQgLTGSWmvX3ICuH8YZRoe/SHCaSKTUBL4u+bN2AdIgKyEj//XGADsZkFiiWW7LnKAmIL CbhJPOlZAhbnFOCRWPenE6xeWCBEYueRD2A2i4CqRO+5J2D1vAK2EhunX4GyBSV+TL4HZHMA zVSXmDIlF2K8vMTmNW+ZQcISQOFHf3UhLnCSaNq8hBmiRERi34t3jBMYhWYhGTQLYdAsJINm IelYwMiyilE0tSC5oDgpPddIrzgxt7g0L10vOT93EyM42p9J72Bc1WBxiFGAg1GJh1dC91+Q EGtiWXFl7iFGCQ5mJRHesIT/QUK8KYmVValF+fFFpTmpxYcYk4HenMgsJZqcD0xEeSXxhsYm ZkaWRmYWRibm5qQJK4nzHmy1DhQSSE8sSc1OTS1ILYLZwsTBKdXAuGRbfkED93mbwBjvvdeT lXweO3ysmXFNapn0oQKVm3I5YlUb3mzcYRzdmh/v3f/GbeUpe7WXei/mfAiV3pOZK2ngvmHt hMmXjhqf9f4YXLd93tajCUUdoo/8W9QmzZnEnCX0716boibzFOkgTgHGiGtiZX/f7+4+oNt/ M6R0CYt6Tdfr58t9lFiKMxINtZiLihMBkO8MSzoDAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Added MMC_DDR52 as eMMC's DDR mode is distinguished from SD-UHS. CC: Wei WANG CC: Samuel Ortiz Signed-off-by: Seungwon Jeon Reviewed-by: Ulf Hansson --- drivers/mmc/host/rtsx_pci_sdmmc.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/rtsx_pci_sdmmc.c b/drivers/mmc/host/rtsx_pci_sdmmc.c index c46feda..752f003 100644 --- a/drivers/mmc/host/rtsx_pci_sdmmc.c +++ b/drivers/mmc/host/rtsx_pci_sdmmc.c @@ -864,6 +864,7 @@ static int sd_set_timing(struct realtek_pci_sdmmc *host, unsigned char timing) rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); break; + case MMC_TIMING_MMC_DDR52: case MMC_TIMING_UHS_DDR50: rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, 0x0C | SD_ASYNC_FIFO_NOT_RST, @@ -944,6 +945,7 @@ static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) host->vpclk = true; host->double_clk = false; break; + case MMC_TIMING_MMC_DDR52: case MMC_TIMING_UHS_DDR50: case MMC_TIMING_UHS_SDR25: host->ssc_depth = RTSX_SSC_DEPTH_1M;