From patchwork Sat Mar 4 12:35:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiner Kallweit X-Patchwork-Id: 9603921 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E3516602B4 for ; Sat, 4 Mar 2017 12:39:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D36222843F for ; Sat, 4 Mar 2017 12:39:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C6C9428497; Sat, 4 Mar 2017 12:39:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6D59E28555 for ; Sat, 4 Mar 2017 12:39:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751945AbdCDMjF (ORCPT ); Sat, 4 Mar 2017 07:39:05 -0500 Received: from mail-wm0-f68.google.com ([74.125.82.68]:36423 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751941AbdCDMi5 (ORCPT ); Sat, 4 Mar 2017 07:38:57 -0500 Received: by mail-wm0-f68.google.com with SMTP id v190so6831477wme.3 for ; Sat, 04 Mar 2017 04:38:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:references:cc:from:message-id:date:user-agent :mime-version:in-reply-to:content-transfer-encoding; bh=XGvTy7Yd844SVgzz5EfqUKwifMlL0GkLjUesJZt/SKg=; b=MNeityEVlU+5WjQYdPy0INj0K5cXehSG81NXdUT784odptlGuReADHQFAjio+Ma45j +pqOkVLmQCdIKIXcFYeysnBjVszFYYoaTRCVL2EdMK4imlG9aPAU2JiO2iqlY3H/BszZ c1+CXYOA0397VXVOfRLy1HOn+I69zxzWcdYnbEbkZvYJ6ApYf7e+ECSyPmKnV81Tpv4T +bfqA3yYQIZ1+Q7H4hMdnUD0a0g/FnFyN7UQBFSIFT9OFk3T3P6TwGgCC3ZM+/4D0yDE zO9J7KZmtUAme5jiU1PfvZorKDbSz5bluDxKanW6LNi2U0KcqLURqf3kc0kKpU5vhzuw XPCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:references:cc:from:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding; bh=XGvTy7Yd844SVgzz5EfqUKwifMlL0GkLjUesJZt/SKg=; b=fKP2mbdD1D4dpXMzLyMmDN3dCRHOPREPxLj6VZhS/HIzaaKL+4Vk8jg3ttc56McmqF KLn0BcO4PYW/YsE5u8vhRcI8ApK1/0ZBFsfYKtm7f1w8dwSqHztvtKfxGqGzxjZjgujw fmNr+ekXm+OrVKiE6ATi2XqvdacEQ/Ctm4BHru3hSKzkVf67JO2Q6oAUomT2EKeySfbv IMGs2nZvF9CPHGU7O6YyzX9iJuD/sBaQz2A8wOHc2I3zEOUXRjyWyqmstubdTxCCaarq 9RtQernqQUVrFyZP4u8ANctAVZlTf0WsERo5xVu2bZn4VhITHBouC1fxu2EDgvU03+qc v26w== X-Gm-Message-State: AMke39nqKJREBs2SiBipbivW/rTaGAV991hDcZbTJel78/2aVk6A+U8DsqSSu1IAZNTWRw== X-Received: by 10.28.88.2 with SMTP id m2mr7339374wmb.12.1488631103004; Sat, 04 Mar 2017 04:38:23 -0800 (PST) Received: from ?IPv6:2003:c6:ebdc:4000:98cd:c51c:6f4e:443? (p200300C6EBDC400098CDC51C6F4E0443.dip0.t-ipconnect.de. [2003:c6:ebdc:4000:98cd:c51c:6f4e:443]) by smtp.googlemail.com with ESMTPSA id 136sm6903694wms.32.2017.03.04.04.38.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 04 Mar 2017 04:38:22 -0800 (PST) Subject: [PATCH v5 8/10] mmc: meson-gx: improve initial configuration To: Ulf Hansson , Kevin Hilman References: Cc: "linux-mmc@vger.kernel.org" , linux-amlogic@lists.infradead.org, Helmut Klein From: Heiner Kallweit Message-ID: <0ec5cb3d-d882-2a33-5878-f4ca0a25555d@gmail.com> Date: Sat, 4 Mar 2017 13:35:13 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 In-Reply-To: Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Config values which are not changed during runtime we can set in the probe function already. The block size setting is overwritten later in meson_mmc_start_cmd anyway if needed, so it doesn't harm if we remove this setting in meson_mmc_set_ios. In addition write config register only if configuration changed. Don't change the location of clock initialization as in an earlier version of the patch, this change causes a hang. This issue was reported and fix suggested by: Helmut Klein Signed-off-by: Heiner Kallweit Acked-by: Kevin Hilman --- v2: - added acked-by v3: - rebased v4: - no changes v5: - reverse changing the location of clock initialization as it causes a hang with the vendor uboot --- drivers/mmc/host/meson-gx-mmc.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 684cc088..84553c23 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -394,15 +394,6 @@ static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) val &= ~(CFG_BUS_WIDTH_MASK << CFG_BUS_WIDTH_SHIFT); val |= bus_width << CFG_BUS_WIDTH_SHIFT; - val &= ~(CFG_BLK_LEN_MASK << CFG_BLK_LEN_SHIFT); - val |= ilog2(SD_EMMC_CFG_BLK_SIZE) << CFG_BLK_LEN_SHIFT; - - val &= ~(CFG_RESP_TIMEOUT_MASK << CFG_RESP_TIMEOUT_SHIFT); - val |= ilog2(SD_EMMC_CFG_RESP_TIMEOUT) << CFG_RESP_TIMEOUT_SHIFT; - - val &= ~(CFG_RC_CC_MASK << CFG_RC_CC_SHIFT); - val |= ilog2(SD_EMMC_CFG_CMD_GAP) << CFG_RC_CC_SHIFT; - val &= ~CFG_DDR; if (ios->timing == MMC_TIMING_UHS_DDR50 || ios->timing == MMC_TIMING_MMC_DDR52 || @@ -413,11 +404,11 @@ static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) if (ios->timing == MMC_TIMING_MMC_HS400) val |= CFG_CHK_DS; - writel(val, host->regs + SD_EMMC_CFG); - - if (val != orig) + if (val != orig) { + writel(val, host->regs + SD_EMMC_CFG); dev_dbg(host->dev, "%s: SD_EMMC_CFG: 0x%08x -> 0x%08x\n", __func__, orig, val); + } } static void meson_mmc_request_done(struct mmc_host *mmc, @@ -695,6 +686,17 @@ static int meson_mmc_get_cd(struct mmc_host *mmc) return status; } +static void meson_mmc_cfg_init(struct meson_host *host) +{ + u32 cfg = 0; + + cfg |= ilog2(SD_EMMC_CFG_RESP_TIMEOUT) << CFG_RESP_TIMEOUT_SHIFT; + cfg |= ilog2(SD_EMMC_CFG_CMD_GAP) << CFG_RC_CC_SHIFT; + cfg |= ilog2(SD_EMMC_CFG_BLK_SIZE) << CFG_BLK_LEN_SHIFT; + + writel(cfg, host->regs + SD_EMMC_CFG); +} + static const struct mmc_host_ops meson_mmc_ops = { .request = meson_mmc_request, .set_ios = meson_mmc_set_ios, @@ -767,6 +769,9 @@ static int meson_mmc_probe(struct platform_device *pdev) writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS); writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN); + /* set config to sane default */ + meson_mmc_cfg_init(host); + ret = devm_request_threaded_irq(&pdev->dev, irq, meson_mmc_irq, meson_mmc_irq_thread, IRQF_SHARED, DRIVER_NAME, host);