From patchwork Fri Mar 4 11:32:42 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arindam Nath X-Patchwork-Id: 608761 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p24BXOPu029838 for ; Fri, 4 Mar 2011 11:34:11 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759388Ab1CDLeL (ORCPT ); Fri, 4 Mar 2011 06:34:11 -0500 Received: from mail-iy0-f174.google.com ([209.85.210.174]:46653 "EHLO mail-iy0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752011Ab1CDLeK (ORCPT ); Fri, 4 Mar 2011 06:34:10 -0500 Received: by iyb26 with SMTP id 26so1806477iyb.19 for ; Fri, 04 Mar 2011 03:34:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:cc:subject:date:message-id :x-mailer:in-reply-to:references; bh=pd/lgJspYx0dQ7hZ8erbZCAxKEDlRYiWg/eH01L+jN0=; b=XCiTmq8L1SlcT3ILIGtNFMVLUu9LTWi0G/brGt8O0C/rD+QNjUJ4UxXFKKWfyX+XOZ qFmDRziOI5BkhPkZEbh7ZiX5RUsvb6yRtlabaw8hLSnwnEhyJmLgtfNUDupTsoMkrelj 4DfKYN0y/VVZ4VRXwK2ju8Fjwbxsx+Zl5Le3k= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; b=oib5ewd3l+WBw/k2yydK94ifQZSAqx82LB+C2ZF1cp5b7ABfbxrUJh3vtsWWvdzwyG MBGoqYz13MrmGf2COI4PVG47UQNYa2MD9XrTrcxCgO37UOE/8A7DcCAxCw20TGkURaJs K65YGrDHDwf70OHTOW3OVoWHtcmy39Cq47huE= Received: by 10.43.66.72 with SMTP id xp8mr560134icb.131.1299238449963; Fri, 04 Mar 2011 03:34:09 -0800 (PST) Received: from localhost ([122.167.0.108]) by mx.google.com with ESMTPS id d10sm1876931ibb.12.2011.03.04.03.34.03 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 04 Mar 2011 03:34:09 -0800 (PST) From: Arindam Nath To: cjb@laptop.org Cc: zhangfei.gao@gmail.com, prakity@marvell.com, subhashj@codeaurora.org, linux-mmc@vger.kernel.org, henry.su@amd.com, aaron.lu@amd.com, anath.amd@gmail.com, Arindam Nath Subject: [PATCH v2 05/12] mmc: sdhci: reset sdclk before setting high speed enable Date: Fri, 4 Mar 2011 17:02:42 +0530 Message-Id: <1299238369-1768-6-git-send-email-arindam.nath@amd.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1299238369-1768-1-git-send-email-arindam.nath@amd.com> References: <1299238369-1768-1-git-send-email-arindam.nath@amd.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 04 Mar 2011 11:34:31 +0000 (UTC) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 1645687..5d3bb11 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1277,13 +1277,12 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) else ctrl &= ~SDHCI_CTRL_HISPD; - sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL1); - if (host->version >= SDHCI_SPEC_300) { u16 ctrl_2; ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); if (!(ctrl_2 & SDHCI_CTRL_PRESET_VAL_ENABLE)) { + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL1); /* * We only need to set Driver Strength if the * preset value enable is not set. @@ -1294,8 +1293,28 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ctrl_2 |= SDHCI_CTRL_DRV_TYPE_C; sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); + } else { + /* + * According to SDHC Spec v3.00, if the Preset Value + * Enable in the Host Control 2 register is set, we + * need to reset SD Clock Enable before changing High + * Speed Enable to avoid generating clock gliches. + */ + u16 clk; + + /* Reset SD Clock Enable */ + clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + clk &= ~SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); + + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL1); + + /* Re-enable SD Clock */ + clk |= SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); } - } + } else + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL1); /* * Some (ENE) controllers go apeshit on some ios operation,