From patchwork Fri Aug 5 03:35:03 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seungwon Jeon X-Patchwork-Id: 1037282 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p753lP6X029121 for ; Fri, 5 Aug 2011 03:47:25 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756212Ab1HEDrA (ORCPT ); Thu, 4 Aug 2011 23:47:00 -0400 Received: from ganesha.gnumonks.org ([213.95.27.120]:60322 "EHLO ganesha.gnumonks.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755993Ab1HEDq7 (ORCPT ); Thu, 4 Aug 2011 23:46:59 -0400 Received: from uucp by ganesha.gnumonks.org with local-bsmtp (Exim 4.72) (envelope-from ) id 1QpBNB-00013W-1r; Fri, 05 Aug 2011 05:46:57 +0200 Received: from [12.23.102.153] (helo=sunrise.dsn.sec.samsung.com) by jackpot.kr.gnumonks.org with esmtp (Exim 4.69) (envelope-from ) id 1QpAPw-00007M-0c; Fri, 05 Aug 2011 11:45:44 +0900 From: Seungwon Jeon To: linux-mmc@vger.kernel.org, cjb@laptop.org Cc: linux-kernel@vger.kernel.org, Seungwon Jeon Subject: [PATCH] mmc: dw_mmc: Fix DDR mode support. Date: Fri, 5 Aug 2011 12:35:03 +0900 Message-Id: <1312515303-17169-1-git-send-email-tgih.jun@samsung.com> X-Mailer: git-send-email 1.7.1 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Fri, 05 Aug 2011 03:47:25 +0000 (UTC) Host driver can't get a hint of DDR mode through ios->ddr flag anymore. ios->timing is currently used to inform DDR mode as a substitute. And capability of MMC_CAP_MMC_HIGHSPEED is added for DDR support. Signed-off-by: Seungwon Jeon Acked-by: Will Newton --- drivers/mmc/host/dw_mmc.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index d65511e..b412a1d 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -699,7 +699,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) } /* DDR mode set */ - if (ios->ddr) { + if (ios->timing == MMC_TIMING_UHS_DDR50) { regs = mci_readl(slot->host, UHS_REG); regs |= (0x1 << slot->id) << 16; mci_writel(slot->host, UHS_REG, regs); @@ -1646,7 +1646,7 @@ static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id) mmc->caps |= MMC_CAP_4_BIT_DATA; if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED) - mmc->caps |= MMC_CAP_SD_HIGHSPEED; + mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; #ifdef CONFIG_MMC_DW_IDMAC mmc->max_segs = host->ring_size;