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[RFC,1/2] MMC: DTS: Add binding for Wondermedia WM8505 SDHC

Message ID 1350289493-30533-2-git-send-email-linux@prisktech.co.nz (mailing list archive)
State New, archived
Headers show

Commit Message

Tony Prisk Oct. 15, 2012, 8:24 a.m. UTC
Binding documentation for WMT SD/MMC Host Controller found on
Wondermedia 8xxx series SoCs.

Based on mmc.txt binding with additional properties.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
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 .../devicetree/bindings/mmc/vt8500-sdmmc.txt       |   24 ++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt
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Patch

diff --git a/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt b/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt
new file mode 100644
index 0000000..69a817e
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+++ b/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt
@@ -0,0 +1,24 @@ 
+* Wondermedia WM8505/WM8650 SD/MMC Host Controller
+
+Required properties:
+- compatible: Should be "wm,wm8505-sdhc".
+- reg: Memory for sdhc controller.
+- interrupts: Two interrupts are required - regular irq and dma irq.
+- clocks: pHandle to clock for controller.
+- bus-width: <1>,<4> or <8> data lines connected
+
+Optional properties:
+- sdon-inverted: SD_ON bit is inverted on the controller
+- cd-inverted: CD bit is inverted on the controller
+
+Examples:
+
+sdhc@d800a000 {
+	compatible = "wm,wm8505-sdhc";
+	reg = <0xd800a000 0x1000>;
+	interrupts = <20 21>;
+	clocks = <&sdhc>;
+	bus-width = <4>;
+	sdon-inverted;
+};
+