From patchwork Thu Jan 10 19:07:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Porter X-Patchwork-Id: 1961611 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id EB7903FC85 for ; Thu, 10 Jan 2013 19:03:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755611Ab3AJTCi (ORCPT ); Thu, 10 Jan 2013 14:02:38 -0500 Received: from mail-vc0-f170.google.com ([209.85.220.170]:45617 "EHLO mail-vc0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755639Ab3AJTCg (ORCPT ); Thu, 10 Jan 2013 14:02:36 -0500 Received: by mail-vc0-f170.google.com with SMTP id fl11so678379vcb.1 for ; Thu, 10 Jan 2013 11:02:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=qYTZY4J5YhiqEQj2oiCbXu8116aUSCfpgAYZnKIZGLY=; b=Y4/37fEsdtknPxYyQQcTA4XD7w9lrXpKZYbXy13E44kELfEu2FxuLagKVyTSsBJwjY U9u/fYaLfGCrST+L7xy0pokAW7ahuiKbSnsy8T/JVNNU/emfDlUXgOAcNlslW/bSSvJl a2JWLSJ27VC6Pp3sEsE4kVc2NlL34iWcTAy+DDmvHY0Qn6BM7O/FLzy4P1CSvHyLzK3S ByKv8k0HeAhwPSi2jGrAqyHI8oZAy9zUqeWQTH3Rg0hXFpuOBI6ZmgvE+XfxSvyps6El RRHSUEl/NBNlG/YXvrmVgrRZ/1ceXcbbUrg80gt+D2N0Xrvflj7Iz5PLJVM6Jfso2G7I 623w== X-Received: by 10.220.107.5 with SMTP id z5mr92027355vco.22.1357844555561; Thu, 10 Jan 2013 11:02:35 -0800 (PST) Received: from beef.ohporter.com (cpe-24-166-64-7.neo.res.rr.com. [24.166.64.7]) by mx.google.com with ESMTPS id dx4sm902920vdb.16.2013.01.10.11.02.34 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 10 Jan 2013 11:02:34 -0800 (PST) From: Matt Porter To: Vinod Koul Cc: Dan Williams , Chris Ball , Grant Likely , Linux DaVinci Kernel List , Linux Kernel Mailing List , Linux MMC List Subject: [PATCH v2 2/3] dma: edma: add device_channel_caps() support Date: Thu, 10 Jan 2013 14:07:05 -0500 Message-Id: <1357844826-30746-3-git-send-email-mporter@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1357844826-30746-1-git-send-email-mporter@ti.com> References: <1357844826-30746-1-git-send-email-mporter@ti.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Implement device_channel_caps(). EDMA has a finite set of PaRAM slots available for linking a multi-segment SG transfer. In order to prevent any one channel from consuming all PaRAM slots to fulfill a large SG transfer, the driver reports a static per-channel max number of SG segments it will handle. The maximum size of SG segment is limited by the slave config maxburst and addr_width for the channel in question. These values are used from the current channel config to calculate and return the max segment length cap. Signed-off-by: Matt Porter --- drivers/dma/edma.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index 82c8672..fc4b9db 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -70,6 +70,7 @@ struct edma_chan { bool alloced; int slot[EDMA_MAX_SLOTS]; struct dma_slave_config cfg; + struct dmaengine_chan_caps caps; }; struct edma_cc { @@ -462,6 +463,28 @@ static void edma_issue_pending(struct dma_chan *chan) spin_unlock_irqrestore(&echan->vchan.lock, flags); } +static struct dmaengine_chan_caps +*edma_get_channel_caps(struct dma_chan *chan, enum dma_transfer_direction dir) +{ + struct edma_chan *echan; + enum dma_slave_buswidth width = 0; + u32 burst = 0; + + if (chan) { + echan = to_edma_chan(chan); + if (dir == DMA_MEM_TO_DEV) { + width = echan->cfg.dst_addr_width; + burst = echan->cfg.dst_maxburst; + } else if (dir == DMA_DEV_TO_MEM) { + width = echan->cfg.src_addr_width; + burst = echan->cfg.src_maxburst; + } + echan->caps.seg_len = (SZ_64K - 1) * width * burst; + return &echan->caps; + } + return NULL; +} + static size_t edma_desc_size(struct edma_desc *edesc) { int i; @@ -521,6 +544,9 @@ static void __init edma_chan_init(struct edma_cc *ecc, echan->ch_num = EDMA_CTLR_CHAN(ecc->ctlr, i); echan->ecc = ecc; echan->vchan.desc_free = edma_desc_free; + dma_cap_set(DMA_SLAVE, echan->caps.cap_mask); + dma_cap_set(DMA_SG, echan->caps.cap_mask); + echan->caps.seg_nr = MAX_NR_SG; vchan_init(&echan->vchan, dma); @@ -537,6 +563,7 @@ static void edma_dma_init(struct edma_cc *ecc, struct dma_device *dma, dma->device_alloc_chan_resources = edma_alloc_chan_resources; dma->device_free_chan_resources = edma_free_chan_resources; dma->device_issue_pending = edma_issue_pending; + dma->device_channel_caps = edma_get_channel_caps; dma->device_tx_status = edma_tx_status; dma->device_control = edma_control; dma->dev = dev;