| Message ID | 1359529229-22207-10-git-send-email-mporter@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wednesday 30 January 2013, Matt Porter wrote: > +Optional properties: > +- dmas: List of DMA controller phandle and DMA request ordered > + pairs. One tx and one rx pair is required for each chip > + select. The binding looks ok, but the wording is slightly incorrect here: strictly speaking, it's not a pair of controller phandle and request line number, but a DMA descriptor as specified in bindings/dma/dma.txt with a format specific to the dma engine being used. That can require more than just a single integer request number. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Jan 30, 2013 at 09:24:00AM +0000, Arnd Bergmann wrote: > On Wednesday 30 January 2013, Matt Porter wrote: > > +Optional properties: > > +- dmas: List of DMA controller phandle and DMA request ordered > > + pairs. One tx and one rx pair is required for each chip > > + select. > > The binding looks ok, but the wording is slightly incorrect here: > strictly speaking, it's not a pair of controller phandle and request > line number, but a DMA descriptor as specified in bindings/dma/dma.txt > with a format specific to the dma engine being used. That can > require more than just a single integer request number. Correct. I will update accordingly. -Matt -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/spi/omap-spi.txt b/Documentation/devicetree/bindings/spi/omap-spi.txt index 938809c..68cb28e 100644 --- a/Documentation/devicetree/bindings/spi/omap-spi.txt +++ b/Documentation/devicetree/bindings/spi/omap-spi.txt @@ -10,7 +10,18 @@ Required properties: input. The default is D0 as input and D1 as output. -Example: +Optional properties: +- dmas: List of DMA controller phandle and DMA request ordered + pairs. One tx and one rx pair is required for each chip + select. +- dma-names: List of DMA request names. These strings correspond + 1:1 with the ordered pairs in dmas. The string naming is + to be "rxN" and "txN" for RX and TX requests, + respectively, where N equals the chip select number. + +Examples: + +[hwmod populated DMA resources] mcspi1: mcspi@1 { #address-cells = <1>; @@ -20,3 +31,17 @@ mcspi1: mcspi@1 { ti,spi-num-cs = <4>; }; +[generic DMA request binding] + +mcspi1: mcspi@1 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,omap4-mcspi"; + ti,hwmods = "mcspi1"; + ti,spi-num-cs = <2>; + dmas = <&edma 42 + &edma 43 + &edma 44 + &edma 45>; + dma-names = "tx0", "rx0", "tx1", "rx1"; +};
The binding definition is based on the generic DMA request binding Signed-off-by: Matt Porter <mporter@ti.com> --- Documentation/devicetree/bindings/spi/omap-spi.txt | 27 +++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-)