From patchwork Mon Oct 14 08:23:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 3034611 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2896FBF924 for ; Mon, 14 Oct 2013 08:23:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F038A2028D for ; Mon, 14 Oct 2013 08:23:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 39AA620279 for ; Mon, 14 Oct 2013 08:23:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752009Ab3JNIXK (ORCPT ); Mon, 14 Oct 2013 04:23:10 -0400 Received: from co9ehsobe004.messaging.microsoft.com ([207.46.163.27]:41707 "EHLO co9outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751451Ab3JNIXJ (ORCPT ); Mon, 14 Oct 2013 04:23:09 -0400 Received: from mail175-co9-R.bigfish.com (10.236.132.238) by CO9EHSOBE014.bigfish.com (10.236.130.77) with Microsoft SMTP Server id 14.1.225.22; Mon, 14 Oct 2013 08:23:08 +0000 Received: from mail175-co9 (localhost [127.0.0.1]) by mail175-co9-R.bigfish.com (Postfix) with ESMTP id 61A968800F0; Mon, 14 Oct 2013 08:23:08 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h1de097h8275dhz2dh87h2a8h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h1151h1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail175-co9 (localhost.localdomain [127.0.0.1]) by mail175-co9 (MessageSwitch) id 1381738986201196_24564; Mon, 14 Oct 2013 08:23:06 +0000 (UTC) Received: from CO9EHSMHS023.bigfish.com (unknown [10.236.132.253]) by mail175-co9.bigfish.com (Postfix) with ESMTP id 22C3B50008B; Mon, 14 Oct 2013 08:23:06 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO9EHSMHS023.bigfish.com (10.236.130.33) with Microsoft SMTP Server (TLS) id 14.16.227.3; Mon, 14 Oct 2013 08:23:06 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server (TLS) id 14.3.158.2; Mon, 14 Oct 2013 08:23:05 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.29]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r9E8MxRG007437; Mon, 14 Oct 2013 01:23:03 -0700 From: Shawn Guo To: CC: Dong Aisheng , Chris Ball , , Shawn Guo Subject: [PATCH 1/5] mmc: sdhci-esdhc-imx: add flag ESDHC_FLAG_NO_DMAS_BITS Date: Mon, 14 Oct 2013 16:23:40 +0800 Message-ID: <1381739024-24924-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1381739024-24924-1-git-send-email-shawn.guo@linaro.org> References: <1381739024-24924-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Just like the use of the flag ESDHC_FLAG_MULTIBLK_NO_INT, let's add another flag ESDHC_FLAG_NO_DMAS_BITS to tell the quirk that PROCTL register has no DMAS bits, and set it for i.MX25 ESDHC. While at it, let's use BIT() macro for ESDHC_FLAG_MULTIBLK_NO_INT as well. Signed-off-by: Shawn Guo --- drivers/mmc/host/sdhci-esdhc-imx.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index b9899e9..e046917 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -73,6 +73,11 @@ #define ESDHC_INT_VENDOR_SPEC_DMA_ERR (1 << 28) /* + * There is no DMAS bits in PROCTL register, e.g. the ESDHC on i.MX25 gets + * DMAS bits PROCTL[9:8] as reserved. + */ +#define ESDHC_FLAG_NO_DMAS_BITS BIT(0) +/* * The CMDTYPE of the CMD register (offset 0xE) should be set to * "11" when the STOP CMD12 is issued on imx53 to abort one * open ended multi-blk IO. Otherwise the TC INT wouldn't @@ -83,7 +88,7 @@ * As a result, the TC flag is not asserted and SW received timeout * exeception. Bit1 of Vendor Spec registor is used to fix it. */ -#define ESDHC_FLAG_MULTIBLK_NO_INT (1 << 1) +#define ESDHC_FLAG_MULTIBLK_NO_INT BIT(1) enum imx_esdhc_type { IMX25_ESDHC, @@ -433,7 +438,7 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) /* ensure the endianness */ new_val |= ESDHC_HOST_CONTROL_LE; /* bits 8&9 are reserved on mx25 */ - if (!is_imx25_esdhc(imx_data)) { + if (!(imx_data->flags & ESDHC_FLAG_NO_DMAS_BITS)) { /* DMA mode bits are shifted */ new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5; } @@ -857,6 +862,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) imx_data->devtype = pdev->id_entry->driver_data; pltfm_host->priv = imx_data; + if (is_imx25_esdhc(imx_data)) + imx_data->flags |= ESDHC_FLAG_NO_DMAS_BITS; + imx_data->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); if (IS_ERR(imx_data->clk_ipg)) { err = PTR_ERR(imx_data->clk_ipg);