From patchwork Mon Nov 4 20:36:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 3137801 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 978AA9F3C4 for ; Mon, 4 Nov 2013 20:36:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 20EBF20119 for ; Mon, 4 Nov 2013 20:36:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2142020144 for ; Mon, 4 Nov 2013 20:36:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753189Ab3KDUg1 (ORCPT ); Mon, 4 Nov 2013 15:36:27 -0500 Received: from ch1ehsobe002.messaging.microsoft.com ([216.32.181.182]:28549 "EHLO ch1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753181Ab3KDUg0 (ORCPT ); Mon, 4 Nov 2013 15:36:26 -0500 Received: from mail169-ch1-R.bigfish.com (10.43.68.250) by CH1EHSOBE002.bigfish.com (10.43.70.52) with Microsoft SMTP Server id 14.1.225.22; Mon, 4 Nov 2013 20:36:25 +0000 Received: from mail169-ch1 (localhost [127.0.0.1]) by mail169-ch1-R.bigfish.com (Postfix) with ESMTP id C4AA416020B; Mon, 4 Nov 2013 20:36:25 +0000 (UTC) X-Forefront-Antispam-Report: CIP:66.35.236.232; KIP:(null); UIP:(null); IPV:NLI; H:SJ-ITEXEDGE02.altera.priv.altera.com; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h1d1ah1d2ah1fc6hzz8275ch1de098h8275bh8275dh1de097hz2fh2a8h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h14ddh1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1d0ch1d2eh1d3fh1dfeh1dffh1e1dh1e23h1fe8h1ff5h2218h2216h1155h) Received-SPF: pass (mail169-ch1: domain of altera.com designates 66.35.236.232 as permitted sender) client-ip=66.35.236.232; envelope-from=dinguyen@altera.com; helo=SJ-ITEXEDGE02.altera.priv.altera.com ; v.altera.com ; Received: from mail169-ch1 (localhost.localdomain [127.0.0.1]) by mail169-ch1 (MessageSwitch) id 1383597383588206_18309; Mon, 4 Nov 2013 20:36:23 +0000 (UTC) Received: from CH1EHSMHS031.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.248]) by mail169-ch1.bigfish.com (Postfix) with ESMTP id 7C7912A00CC; Mon, 4 Nov 2013 20:36:23 +0000 (UTC) Received: from SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) by CH1EHSMHS031.bigfish.com (10.43.70.31) with Microsoft SMTP Server (TLS) id 14.16.227.3; Mon, 4 Nov 2013 20:36:21 +0000 Received: from sj-mail01.altera.com (137.57.1.6) by SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) with Microsoft SMTP Server id 8.3.327.1; Mon, 4 Nov 2013 12:24:47 -0800 Received: from linux-builds1.altera.com (linux-builds1.altera.com [137.57.188.65]) by sj-mail01.altera.com (8.13.7+Sun/8.13.7) with ESMTP id rA4KaGSb022757; Mon, 4 Nov 2013 12:36:19 -0800 (PST) From: To: CC: Dinh Nguyen , Arnd Bergmann , Mike Turquette , Olof Johansson , Rob Herring , Pawel Moll , Mark Rutland , Stephen Warren , Ian Campbell , Chris Ball , Jaehoon Chung , Seungwon Jeon , , , Subject: [PATCHv2 2/4] arm: dts: Add a system manager compatible property Date: Mon, 4 Nov 2013 14:36:03 -0600 Message-ID: <1383597364-25613-3-git-send-email-dinguyen@altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1383597364-25613-1-git-send-email-dinguyen@altera.com> References: <1383597364-25613-1-git-send-email-dinguyen@altera.com> MIME-Version: 1.0 X-OriginatorOrg: altera.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dinh Nguyen The "altr,sysmgr-sdmmc-sdr" compatible property is used for the SOCFPGA clk-sysmgr driver. This property represents the register inside the system manager that controls the clock phase of the SD/MMC driver. Also add "syscon" to the system manager node. Signed-off-by: Dinh Nguyen CC: Arnd Bergmann Cc: Mike Turquette CC: Olof Johansson Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Stephen Warren Cc: Ian Campbell Cc: Chris Ball Cc: Jaehoon Chung Cc: Seungwon Jeon Cc: devicetree@vger.kernel.org Cc: linux-mmc@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org --- .../bindings/arm/altera/socfpga-system.txt | 10 ++++++++++ arch/arm/boot/dts/socfpga.dtsi | 12 ++++++++++-- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt index f4d04a0..7a6c7ed 100644 --- a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt @@ -5,9 +5,19 @@ Required properties: - reg : Should contain 1 register ranges(address and length) - cpu1-start-addr : CPU1 start address in hex. +Optional properties: +- compatible = "altr,sysmgr-sdmmc-sdr". This compatible property is used +to represent the clock phase settings for the SD/MMC IP. + Example: sysmgr@ffd08000 { compatible = "altr,sys-mgr"; reg = <0xffd08000 0x1000>; cpu1-start-addr = <0xffd080c4>; + + sysmgr_sdr_mmc: sysmgr_sdr_mmc { + #clock-cells = <0>; + compatible = "altr,sysmgr-sdmmc-sdr"; + reg = <0x108 1>; + }; }; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index e273fa9..eb990d2 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -521,8 +521,16 @@ }; sysmgr@ffd08000 { - compatible = "altr,sys-mgr"; - reg = <0xffd08000 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "altr,sys-mgr", "syscon"; + reg = <0xffd08000 0x4000>; + + sysmgr_sdr_mmc: sysmgr_sdr_mmc { + #clock-cells = <0>; + compatible = "altr,sysmgr-sdmmc-sdr"; + reg = <0x108 1>; }; + }; }; };