From patchwork Tue Feb 18 02:31:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 3666741 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 66E30BF13A for ; Tue, 18 Feb 2014 02:33:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7060F201FE for ; Tue, 18 Feb 2014 02:33:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 60DF2201CD for ; Tue, 18 Feb 2014 02:33:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751254AbaBRCd2 (ORCPT ); Mon, 17 Feb 2014 21:33:28 -0500 Received: from mail-bl2on0127.outbound.protection.outlook.com ([65.55.169.127]:3843 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752226AbaBRCd1 (ORCPT ); Mon, 17 Feb 2014 21:33:27 -0500 Received: from BL2FFO11FD034.protection.gbl (10.173.160.34) by BL2FFO11HUB019.protection.gbl (10.173.160.111) with Microsoft SMTP Server (TLS) id 15.0.868.13; Tue, 18 Feb 2014 02:33:13 +0000 Received: from SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) by BL2FFO11FD034.mail.protection.outlook.com (10.173.161.130) with Microsoft SMTP Server (TLS) id 15.0.868.13 via Frontend Transport; Tue, 18 Feb 2014 02:33:12 +0000 Received: from sj-mail01.altera.com (137.57.1.6) by SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) with Microsoft SMTP Server id 8.3.342.0; Mon, 17 Feb 2014 18:20:34 -0800 Received: from linux-builds1.altera.com (linux-builds1.altera.com [137.57.188.114]) by sj-mail01.altera.com (8.13.7+Sun/8.13.7) with ESMTP id s1I2X7d2001200; Mon, 17 Feb 2014 18:33:10 -0800 (PST) From: To: CC: , , Dinh Nguyen , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , "Seungwon Jeon" , Jaehoon Chung , "Chris Ball" Subject: [PATCHv3 2/3] mmc: dw_mmc: Add support for SOCFPGA's platform specific implementation Date: Mon, 17 Feb 2014 20:31:01 -0600 Message-ID: <1392690662-19106-2-git-send-email-dinguyen@altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1392690662-19106-1-git-send-email-dinguyen@altera.com> References: <1392690662-19106-1-git-send-email-dinguyen@altera.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: =?us-ascii?Q?CIP:66.35.236.232; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(1001?= =?us-ascii?Q?9001)(979002)(6009001)(199002)(189002)(74876001)(74706001)(5?= =?us-ascii?Q?6776001)(81686001)(77982001)(36756003)(79102001)(83322001)(2?= =?us-ascii?Q?0776003)(88136002)(59766001)(76482001)(19580395003)(19580405?= =?us-ascii?Q?001)(51856001)(76786001)(6806004)(77096001)(63696002)(534160?= =?us-ascii?Q?03)(76796001)(44976005)(77156001)(93916002)(93516002)(863620?= =?us-ascii?Q?01)(80976001)(81816001)(46102001)(53806001)(54316002)(477760?= =?us-ascii?Q?03)(47446002)(50466002)(92566001)(74662001)(31966008)(477360?= =?us-ascii?Q?01)(33646001)(81542001)(83072002)(85852003)(65816001)(800220?= =?us-ascii?Q?01)(87286001)(87266001)(95666001)(85306002)(69226001)(629660?= =?us-ascii?Q?02)(4396001)(87936001)(93136001)(94316002)(50986001)(5022600?= =?us-ascii?Q?1)(95416001)(49866001)(47976001)(81342001)(74366001)(9272600?= =?us-ascii?Q?1)(94946001)(48376002)(86152002)(89996001)(90146001)(7450200?= =?us-ascii?Q?1)(56816005)(969003)(989001)(999001)(1009001)(1019001); DIR:O?= =?us-ascii?Q?UT; SFP:1102; SCL:1; SRVR:BL2FFO11HUB019; H:SJ-ITEXEDGE02.altera?= =?us-ascii?Q?.priv.altera.com; CLIP:66.35.236.232; FPR:E084FBFF.B0D60768.77?= =?us-ascii?Q?195F47.44D10281.2028D; MLV:ovrnspm; InfoDomainNonexistentA:1; M?= =?us-ascii?Q?X:1;LANG:en;?= X-OriginatorOrg: altera.onmicrosoft.com X-Forefront-PRVS: 0126A32F74 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dinh Nguyen Like the rockchip, Altera's SOCFPGA platform specific implementation of the dw_mmc driver requires using the HOLD register for SD commands. This patch renames dw_mci_rockchip_prepare_command to dw_mci_pltfm_prepare_command so that SOCFPGA and Rockchip can use it. Signed-off-by: Dinh Nguyen Acked-by: Steffen Trumtrar Tested-by: Steffen Trumtrar Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Seungwon Jeon Cc: Jaehoon Chung Cc: Chris Ball Acked-by: Seungwon Jeon --- v3: Renamed dw_mci_rockchip_prepare_command to dw_mci_pltfm_prepare_command v2: Use dw_mci_socfpga_prepare_command instead of dw_mci_rockchip_prepare_command --- drivers/mmc/host/dw_mmc-pltfm.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c index 5c49656..3263327 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.c +++ b/drivers/mmc/host/dw_mmc-pltfm.c @@ -25,13 +25,17 @@ #include "dw_mmc.h" #include "dw_mmc-pltfm.h" -static void dw_mci_rockchip_prepare_command(struct dw_mci *host, u32 *cmdr) +static void dw_mci_pltfm_prepare_command(struct dw_mci *host, u32 *cmdr) { *cmdr |= SDMMC_CMD_USE_HOLD_REG; } static const struct dw_mci_drv_data rockchip_drv_data = { - .prepare_command = dw_mci_rockchip_prepare_command, + .prepare_command = dw_mci_pltfm_prepare_command, +}; + +static const struct dw_mci_drv_data socfpga_drv_data = { + .prepare_command = dw_mci_pltfm_prepare_command, }; int dw_mci_pltfm_register(struct platform_device *pdev, @@ -92,6 +96,8 @@ static const struct of_device_id dw_mci_pltfm_match[] = { { .compatible = "snps,dw-mshc", }, { .compatible = "rockchip,rk2928-dw-mshc", .data = &rockchip_drv_data }, + { .compatible = "altr,socfpga-dw-mshc", + .data = &socfpga_drv_data }, {}, }; MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match);