From patchwork Fri May 9 06:53:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aisheng Dong X-Patchwork-Id: 4140671 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 163749F23C for ; Fri, 9 May 2014 08:08:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 37000202E9 for ; Fri, 9 May 2014 08:08:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E2EE5202DD for ; Fri, 9 May 2014 08:08:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751968AbaEIIIB (ORCPT ); Fri, 9 May 2014 04:08:01 -0400 Received: from mail-bn1blp0185.outbound.protection.outlook.com ([207.46.163.185]:1487 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751298AbaEIIH5 (ORCPT ); Fri, 9 May 2014 04:07:57 -0400 Received: from BLUPR03CA034.namprd03.prod.outlook.com (10.141.30.27) by BLUPR03MB246.namprd03.prod.outlook.com (10.255.213.18) with Microsoft SMTP Server (TLS) id 15.0.939.12; Fri, 9 May 2014 08:07:54 +0000 Received: from BY2FFO11FD031.protection.gbl (2a01:111:f400:7c0c::178) by BLUPR03CA034.outlook.office365.com (2a01:111:e400:879::27) with Microsoft SMTP Server (TLS) id 15.0.934.12 via Frontend Transport; Fri, 9 May 2014 08:07:54 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BY2FFO11FD031.mail.protection.outlook.com (10.1.14.196) with Microsoft SMTP Server (TLS) id 15.0.939.9 via Frontend Transport; Fri, 9 May 2014 08:07:54 +0000 Received: from shlinux1.ap.freescale.net (shlinux1.ap.freescale.net [10.192.225.216]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s4987pXb025505; Fri, 9 May 2014 01:07:52 -0700 From: Dong Aisheng To: CC: , , , Subject: [PATCH 1/1] mmc: sdhci-esdhc-imx: fix mmc ddr mode regression issue Date: Fri, 9 May 2014 14:53:15 +0800 Message-ID: <1399618395-359-1-git-send-email-b29396@freescale.com> X-Mailer: git-send-email 1.7.8 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10009001)(6009001)(199002)(189002)(92726001)(44976005)(83322001)(19580395003)(76482001)(19580405001)(79102001)(68736004)(77982001)(84676001)(97736001)(33646001)(74502001)(21056001)(74662001)(31966008)(81542001)(81342001)(93916002)(69596002)(62966002)(48376002)(64706001)(20776003)(47776003)(80022001)(50466002)(87286001)(6806004)(83072002)(85852003)(50226001)(77096999)(81156002)(92566001)(87936001)(4396001)(99396002)(50986999)(77156001)(36756003)(46102001)(2009001)(89996001)(42262001); DIR:OUT; SFP:1101; SCL:1; SRVR:BLUPR03MB246; H:az84smr01.freescale.net; FPR:; MLV:sfv; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Forefront-PRVS: 02065A9E77 Received-SPF: Fail (: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=Aisheng.Dong@freescale.com; X-OriginatorOrg: freescale.com Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The regression is caused by the following commit ... commit 79f7ae7c45a6ccf04e2908337461dee615f6afb0 Author: Seungwon Jeon Date: Fri Mar 14 21:11:56 2014 +0900 mmc: clarify DDR timing mode between SD-UHS and eMMC This change distinguishes DDR timing mode of current mixed usage to clarify device type. Signed-off-by: Seungwon Jeon Acked-by: Jaehoon Chung Signed-off-by: Ulf Hansson Signed-off-by: Chris Ball ... and the line below. @@ -1264,7 +1264,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, goto err; } mmc_card_set_ddr_mode(card); - mmc_set_timing(card->host, MMC_TIMING_UHS_DDR50); + mmc_set_timing(card->host, MMC_TIMING_MMC_DDR52); mmc_set_bus_width(card->host, bus_width); } } It's caused by the platform driver was still using MMC_TIMING_UHS_DDR50 for MMC DDR mode which needs update too. Reported-by: Fabio Estevam Reported-by: Shawn Guo Signed-off-by: Dong Aisheng Tested-by: Fabio Estevam --- drivers/mmc/host/sdhci-esdhc-imx.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index b841bb7..16e4219 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -858,6 +858,7 @@ static int esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR104; break; case MMC_TIMING_UHS_DDR50: + case MMC_TIMING_MMC_DDR52: imx_data->uhs_mode = SDHCI_CTRL_UHS_DDR50; writel(readl(host->ioaddr + ESDHC_MIX_CTRL) | ESDHC_MIX_CTRL_DDREN,