From patchwork Thu May 15 09:37:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 4180431 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 512A1BFF02 for ; Thu, 15 May 2014 09:39:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 807082035D for ; Thu, 15 May 2014 09:39:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9360C20306 for ; Thu, 15 May 2014 09:39:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753554AbaEOJja (ORCPT ); Thu, 15 May 2014 05:39:30 -0400 Received: from mail-we0-f175.google.com ([74.125.82.175]:48017 "EHLO mail-we0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754846AbaEOJhx (ORCPT ); Thu, 15 May 2014 05:37:53 -0400 Received: by mail-we0-f175.google.com with SMTP id t61so774166wes.6 for ; Thu, 15 May 2014 02:37:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fxVO9FTv8B41qMSKxFFJp3PVHpdq6vUtCYdg9K2lATg=; b=J3jlz2W6uPeXdELfa6wsaEJoD8Yb5tMtqUCB5GhWpjwSgics8Rtvx+82tHyKdKS2KS x42VMkH0rviCPoPSTjAQhk1FqXWGNoDq3Mt44hHKECEhmHNUY9a/FeLeAfHvkr/qU0VJ YOghE3yZIwsHVFvEB+ed4x+u27zV1APqmEp5NVmE25dbvQUklPjewyEIx6C8PJ6oYzk/ mu7pHT8a/YZd6aov0T7uY/ZDsAvEK0WLS/V8U/Ah50W3oe2AZX5KwgqD2p4fSdZuSkOa ejJj0QqTf5HrqbYElUgs0tda1Cn0Yx6yrNugEPGHc02pGomOonDTpjoaNWrnSyc73NXA NJNQ== X-Gm-Message-State: ALoCoQmBrFr1+nUEBZUKXbb/hf0KRmHYRZ8d4OC751pJFGLf/iaMIXTqcdDGEJ4EBfT/OK+3P/b5 X-Received: by 10.180.94.98 with SMTP id db2mr7694116wib.1.1400146672269; Thu, 15 May 2014 02:37:52 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-145-240-98.as13285.net. [78.145.240.98]) by mx.google.com with ESMTPSA id vm8sm6061485wjc.27.2014.05.15.02.37.50 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 May 2014 02:37:51 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v2 12/14] mmc: mmci: add support for fbclk to latch data and cmd. Date: Thu, 15 May 2014 10:37:49 +0100 Message-Id: <1400146669-30302-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinivas Kandagatla This patch adds support to fbclk that is used to latch data and cmd on some controllers like SD Card controller in Qcom SOC. Signed-off-by: Srinivas Kandagatla --- drivers/mmc/host/mmci.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 05ae654..bc7b80d 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -54,6 +54,8 @@ static unsigned int fmax = 515633; * @clkreg_enable: enable value for MMCICLOCK register * @clkreg_8bit_bus_enable: enable value for 8 bit bus * @clkreg_neg_edge_enable: enable value for inverted data/cmd output + * @clkreg_fbclk_latch: enable value to select feedback clock to + * latch data and command comming in. * @datalength_bits: number of bits in the MMCIDATALENGTH register * @fifosize: number of bytes that can be written when MMCI_TXFIFOEMPTY * is asserted (likewise for RX) @@ -79,6 +81,7 @@ struct variant_data { unsigned int clkreg_enable; unsigned int clkreg_8bit_bus_enable; unsigned int clkreg_neg_edge_enable; + unsigned int clkreg_fbclk_latch; unsigned int datalength_bits; unsigned int fifosize; unsigned int fifohalfsize; @@ -189,6 +192,7 @@ static struct variant_data variant_qcom = { .clkreg = MCI_CLK_ENABLE, .clkreg_enable = MCI_QCOM_CLK_FLOWENA, .clkreg_8bit_bus_enable = MCI_QCOM_CLK_WIDEBUS_8, + .clkreg_fbclk_latch = MCI_QCOM_CLK_FEEDBACK_CLK, .datactrl_mask_ddrmode = MCI_QCOM_CLK_DDR_MODE, .data_cmd_enable = MCI_QCOM_CSPM_DATCMD, .blksz_datactrl4 = true, @@ -343,6 +347,7 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) host->cclk = host->mclk / (2 * (clk + 1)); } + clk |= variant->clkreg_fbclk_latch; clk |= variant->clkreg_enable; clk |= MCI_CLK_ENABLE; /* This hasn't proven to be worthwhile */