From patchwork Thu May 15 09:37:56 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 4180391 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 02172BFF02 for ; Thu, 15 May 2014 09:38:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2043A2035D for ; Thu, 15 May 2014 09:38:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F17C820306 for ; Thu, 15 May 2014 09:38:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754932AbaEOJiF (ORCPT ); Thu, 15 May 2014 05:38:05 -0400 Received: from mail-we0-f181.google.com ([74.125.82.181]:45026 "EHLO mail-we0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754908AbaEOJiA (ORCPT ); Thu, 15 May 2014 05:38:00 -0400 Received: by mail-we0-f181.google.com with SMTP id w61so760333wes.26 for ; Thu, 15 May 2014 02:37:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=r7zg3oZKkkRdQqVuvG8jAEHpb0j6RdHsuKO03LtH+NY=; b=aB0f8vCTe1X2E4DccDMAx0Ph9Ifa55/qsDxKK0LjmVEoQFOSWKBSxj5IoioHI9XLnV neacEQTUL2gRTbQNdnMCArRfWbCneEMG47TlzyC4gAxB4MjJRlQBjxqKv2m6WyQRGuuD bbXc6R3tfJfhwoleLCm7CxDeyQZhOyA3hQAG7xjNcqI0NoJyBp7wP5C0fuDPkPFQXaqK hyZA2oRG/QSo3qh0kqtoktbT+4VxO/FSfjiTpgWuKBALykh7BCOS8fnRIpzXWKrwWr1I U7AMLunIb0djIkAD1bUWwloP19LeL5GmuTXduC9s/wcMx+EfuSLj3QZ2fEyaX/d3h1az BsSg== X-Gm-Message-State: ALoCoQkWxFC6xNDKSV2zYL92ZCeVkcIf2RrBC7T8iCQxi3WjGHQ4mUQEkqCEt2Hs3nXm6jJ3AQZi X-Received: by 10.194.89.40 with SMTP id bl8mr108209wjb.90.1400146679061; Thu, 15 May 2014 02:37:59 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-145-240-98.as13285.net. [78.145.240.98]) by mx.google.com with ESMTPSA id l9sm8846946wic.21.2014.05.15.02.37.57 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 May 2014 02:37:58 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v2 13/14] mmc: mmci: add qcom specific clk control Date: Thu, 15 May 2014 10:37:56 +0100 Message-Id: <1400146676-30343-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinivas Kandagatla On Qcom SD card controller, cclk is mclk and mclk should be directly controlled by the driver. This patch adds support to control mclk directly in the driver, and also adds explicit_mclk_control and cclk_is_mclk flags in variant structure giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index bc7b80d..cf58fec1 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -75,6 +75,8 @@ static unsigned int fmax = 515633; * @pwrreg_nopower: bits in MMCIPOWER don't controls ext. power supply * @mclk_delayed_writes: enable delayed writes to ensure, subsequent updates * are not ignored. + * @explicit_mclk_control: enable explicit mclk control in driver. + * @qcom_cclk_is_mclk: enable iff card clock is multimedia card adapter clock. */ struct variant_data { unsigned int clkreg; @@ -97,6 +99,8 @@ struct variant_data { bool busy_detect; bool pwrreg_nopower; bool mclk_delayed_writes; + bool explicit_mclk_control; + bool qcom_cclk_is_mclk; }; static struct variant_data variant_arm = { @@ -205,6 +209,8 @@ static struct variant_data variant_qcom = { * for 3 clk cycles. */ .mclk_delayed_writes = true, + .explicit_mclk_control = true, + .qcom_cclk_is_mclk = true, }; static inline u32 mmci_readl(struct mmci_host *host, u32 off) @@ -320,7 +326,9 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) host->cclk = 0; if (desired) { - if (desired >= host->mclk) { + if (variant->qcom_cclk_is_mclk) { + host->cclk = host->mclk; + } else if (desired >= host->mclk) { clk = MCI_CLK_BYPASS; if (variant->st_clkdiv) clk |= MCI_ST_UX500_NEG_EDGE; @@ -1358,6 +1366,16 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) if (!ios->clock && variant->pwrreg_clkgate) pwr &= ~MCI_PWR_ON; + if (ios->clock != host->mclk && host->variant->explicit_mclk_control) { + int rc = clk_set_rate(host->clk, ios->clock); + if (rc < 0) { + dev_err(mmc_dev(host->mmc), + "Error setting clock rate (%d)\n", rc); + } else { + host->mclk = clk_get_rate(host->clk); + } + } + spin_lock_irqsave(&host->lock, flags); mmci_set_clkreg(host, ios->clock); @@ -1544,10 +1562,12 @@ static int mmci_probe(struct amba_device *dev, * is not specified. Either value must not exceed the clock rate into * the block, of course. */ - if (mmc->f_max) - mmc->f_max = min(host->mclk, mmc->f_max); - else - mmc->f_max = min(host->mclk, fmax); + if (!host->variant->explicit_mclk_control) { + if (mmc->f_max) + mmc->f_max = min(host->mclk, mmc->f_max); + else + mmc->f_max = min(host->mclk, fmax); + } dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); /* Get regulators and the supported OCR mask */