From patchwork Thu May 15 09:38:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 4180381 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EB1FA9F387 for ; Thu, 15 May 2014 09:38:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2113820306 for ; Thu, 15 May 2014 09:38:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 306592037E for ; Thu, 15 May 2014 09:38:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754962AbaEOJiM (ORCPT ); Thu, 15 May 2014 05:38:12 -0400 Received: from mail-wi0-f175.google.com ([209.85.212.175]:63290 "EHLO mail-wi0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754955AbaEOJiJ (ORCPT ); Thu, 15 May 2014 05:38:09 -0400 Received: by mail-wi0-f175.google.com with SMTP id f8so9464235wiw.8 for ; Thu, 15 May 2014 02:38:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QHrGeSZUpWVeUEYFm5JWQK0imj65CIJVotz/Mx/AU3c=; b=AwZw45UOMT81UabAcgT6qnXNhrKDAEUAEY/ON6OGrlZUnpOxuDyGr355jkZnvELjJd 7krZqeKqxlujVYH6jXSMVD3IP8frT50cMqWAMmv1pLTEX4FJuFKHmVVtxnPcAcdvJqBf s6Jj/eS4Wzg+dvmRB82TV3RGNvfgQXcyu2YmONEJ5tPXiDGo23SFmmT42ZF0LOB3u15L /ZVgKKgTmxGTRJTKTYvKTp+qvg3FAZ8QlQBZQJ51iAXIr6Epmb+KacZLsiiXYtO/xm1A uunWF26DqjssdbiQzrIQCZMABEh+ObSjx4w0nb8MjWVX1p0cNdDXZeUu9rubaxC/401B MF6A== X-Gm-Message-State: ALoCoQlHnQpwEEWbXakindIm/IS8+MdertMO86O0Z3DRHR7NnWHggLXpQDhbMZ5CgzPLUYz5e8eR X-Received: by 10.180.98.37 with SMTP id ef5mr7071957wib.24.1400146688112; Thu, 15 May 2014 02:38:08 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-145-240-98.as13285.net. [78.145.240.98]) by mx.google.com with ESMTPSA id fo10sm8862245wib.12.2014.05.15.02.38.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 May 2014 02:38:07 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v2 14/14] mmc: mmci: Add Qcom specific pio_read function. Date: Thu, 15 May 2014 10:38:04 +0100 Message-Id: <1400146684-30384-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinivas Kandagatla MCIFIFOCNT register behaviour on Qcom chips is very different than the other pl180 integrations. MCIFIFOCNT register contains the number of words that are still waiting to be transferred through the FIFO. It keeps decrementing once the host CPU reads the MCIFIFO. With the existing logic and the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT register will always return transfer size before reading the FIFO. Also the data sheet states that "This register is only useful for debug purposes and should not be used for normal operation since it does not reflect data which may or may not be in the pipeline". This patch implements qcom_pio_read function so as existing mmci_pio_read is not suitable for Qcom SOCs. qcom_pio_read function is only selected based on qcom_fifo flag in variant data structure. Signed-off-by: Srinivas Kandagatla --- drivers/mmc/host/mmci.c | 35 +++++++++++++++++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index cf58fec1..94b99d6 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -77,6 +77,7 @@ static unsigned int fmax = 515633; * are not ignored. * @explicit_mclk_control: enable explicit mclk control in driver. * @qcom_cclk_is_mclk: enable iff card clock is multimedia card adapter clock. + * @qcom_fifo: enables qcom specific fifo pio read function. */ struct variant_data { unsigned int clkreg; @@ -101,6 +102,7 @@ struct variant_data { bool mclk_delayed_writes; bool explicit_mclk_control; bool qcom_cclk_is_mclk; + bool qcom_fifo; }; static struct variant_data variant_arm = { @@ -211,6 +213,7 @@ static struct variant_data variant_qcom = { .mclk_delayed_writes = true, .explicit_mclk_control = true, .qcom_cclk_is_mclk = true, + .qcom_fifo = true, }; static inline u32 mmci_readl(struct mmci_host *host, u32 off) @@ -1026,6 +1029,29 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, } } +static int mmci_qcom_pio_read(struct mmci_host *host, char *buffer, + unsigned int remain) +{ + uint32_t *ptr = (uint32_t *) buffer; + int count = 0; + struct variant_data *variant = host->variant; + int fifo_size = variant->fifosize; + + if (remain % 4) + remain = ((remain >> 2) + 1) << 2; + + while (readl(host->base + MMCISTATUS) & MCI_RXDATAAVLBL) { + *ptr = readl(host->base + MMCIFIFO + (count % fifo_size)); + ptr++; + count += sizeof(uint32_t); + + remain -= sizeof(uint32_t); + if (remain == 0) + break; + } + return count; +} + static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain) { void __iomem *base = host->base; @@ -1147,8 +1173,13 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) remain = sg_miter->length; len = 0; - if (status & MCI_RXACTIVE) - len = mmci_pio_read(host, buffer, remain); + if (status & MCI_RXACTIVE) { + if (variant->qcom_fifo) + len = mmci_qcom_pio_read(host, buffer, remain); + else + len = mmci_pio_read(host, buffer, remain); + } + if (status & MCI_TXACTIVE) len = mmci_pio_write(host, buffer, remain, status);