From patchwork Fri May 30 17:13:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 4273031 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 43BA99F336 for ; Fri, 30 May 2014 17:17:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5A51C20268 for ; Fri, 30 May 2014 17:17:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3E84B20265 for ; Fri, 30 May 2014 17:17:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934352AbaE3RNq (ORCPT ); Fri, 30 May 2014 13:13:46 -0400 Received: from mail-wi0-f174.google.com ([209.85.212.174]:56062 "EHLO mail-wi0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934345AbaE3RNp (ORCPT ); Fri, 30 May 2014 13:13:45 -0400 Received: by mail-wi0-f174.google.com with SMTP id r20so1530771wiv.13 for ; Fri, 30 May 2014 10:13:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WYWRZA1UPclbFMLH8SnWjmJeAYdHtOQd5PZGe/gI5Vc=; b=FzVQWTeA0DJcIiJRri2H/CRKqciyKq6JfXeTMIWaecXibx5sEJueCoLQxEcxYMZPbh 8WdfnsBlbmIvM29KKYoH5Rva5cDr67w5qxkJqAZgRw3C2yT8Dw0MsdFhcGXPM/+VZIV1 pSp5AUYB4LIeWT+i2G7CqWMJr1/L394+Av3DyDnUGJK4AjYecCLcBv3J7jAWzMTp/7W0 WjeRSRyi+tWnpH8d4t05MI5Je34KzMptrinlC2K06A73aNe8PeJqGzG4M9WXpTMmMH1b O6K27AxGQzwjRbNA+jOrbUWb5LrjdT1d9fHXsHPt0PlvI1PSD92HHsOmXw5Q6QiLDOPL pDOQ== X-Gm-Message-State: ALoCoQkPC/T6UaMK+dh6ma49T3FCPtGnbKP+9KcY7NL/8qZ3pS8erqhKtLGUYFz2qDWJ4+h2nDA7 X-Received: by 10.180.189.76 with SMTP id gg12mr8752607wic.28.1401470023857; Fri, 30 May 2014 10:13:43 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-149-4-211.as13285.net. [78.149.4.211]) by mx.google.com with ESMTPSA id l5sm7472047wif.22.2014.05.30.10.13.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 30 May 2014 10:13:42 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v5 06/13] mmc: mmci: add ddrmode mask to variant data Date: Fri, 30 May 2014 18:13:39 +0100 Message-Id: <1401470019-27072-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1401469918-26817-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1401469918-26817-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinivas Kandagatla This patch adds ddrmode mask to variant structure giving more flexibility to the driver to support more SOCs which have different datactrl register layout. Without this patch datactrl register is updated with incorrect ddrmode mask, resulting in failures on Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 72981f6..ad7e538 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -59,6 +59,7 @@ static unsigned int fmax = 515633; * is asserted (likewise for RX) * @sdio: variant supports SDIO * @st_clkdiv: true if using a ST-specific clock divider algorithm + * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl * register @@ -74,6 +75,7 @@ struct variant_data { unsigned int datalength_bits; unsigned int fifosize; unsigned int fifohalfsize; + unsigned int datactrl_mask_ddrmode; bool sdio; bool st_clkdiv; bool blksz_datactrl16; @@ -152,6 +154,7 @@ static struct variant_data variant_ux500v2 = { .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, .clkreg_enable = MCI_ST_UX500_HWFCEN, + .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, .datalength_bits = 24, .sdio = true, .st_clkdiv = true, @@ -770,7 +773,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) } if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) - datactrl |= MCI_ST_DPSM_DDRMODE; + datactrl |= variant->datactrl_mask_ddrmode; /* * Attempt to use DMA operation mode, if this