diff mbox

[03/14] ARM: sunxi: sun5i: Enforce max frequency on PLL6

Message ID 1405588134-2396-4-git-send-email-maxime.ripard@free-electrons.com (mailing list archive)
State New, archived
Headers show

Commit Message

Maxime Ripard July 17, 2014, 9:08 a.m. UTC
PLL6 out of reset is running at 2.4GHz, which is outside of its operating
boundaries.

Enforce its maximum frequency as set in the datasheet to make sure we stays
within these bounds.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun5i-a13.dtsi | 1 +
 1 file changed, 1 insertion(+)

Comments

Emilio López July 17, 2014, 4:19 p.m. UTC | #1
Hi Maxime,

El 17/07/14 06:08, Maxime Ripard escribió:
> PLL6 out of reset is running at 2.4GHz, which is outside of its operating
> boundaries.
>
> Enforce its maximum frequency as set in the datasheet to make sure we stays
> within these bounds.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
>   arch/arm/boot/dts/sun5i-a13.dtsi | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
> index bf86e65dd167..de89edc5e5b3 100644
> --- a/arch/arm/boot/dts/sun5i-a13.dtsi
> +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
> @@ -97,6 +97,7 @@
>   			reg = <0x01c20028 0x4>;
>   			clocks = <&osc24M>;
>   			clock-output-names = "pll6_sata", "pll6_other", "pll6";
> +			clock-max-frequency = <1200000000>;
>   		};
>
>   		/* dummy is 200M */
>

This patch itself is ok, but I'm not seeing so far where is 
"clock-max-frequency" read from the DT and passed to the clock for later 
verification. Did you leave that out by mistake when shuffling patches?

Cheers!

Emilio
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index bf86e65dd167..de89edc5e5b3 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -97,6 +97,7 @@ 
 			reg = <0x01c20028 0x4>;
 			clocks = <&osc24M>;
 			clock-output-names = "pll6_sata", "pll6_other", "pll6";
+			clock-max-frequency = <1200000000>;
 		};
 
 		/* dummy is 200M */