From patchwork Tue Aug 12 23:21:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 4715311 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D4CD79F375 for ; Tue, 12 Aug 2014 23:22:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 03FE320107 for ; Tue, 12 Aug 2014 23:22:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1EC0920172 for ; Tue, 12 Aug 2014 23:22:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751608AbaHLXWP (ORCPT ); Tue, 12 Aug 2014 19:22:15 -0400 Received: from mail-yh0-f74.google.com ([209.85.213.74]:57509 "EHLO mail-yh0-f74.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751550AbaHLXVU (ORCPT ); Tue, 12 Aug 2014 19:21:20 -0400 Received: by mail-yh0-f74.google.com with SMTP id 29so1341560yhl.3 for ; Tue, 12 Aug 2014 16:21:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=T0TSxN9LHS1O77Qngt98N9CGcu80bqNLjAGKbv75/kA=; b=G6XxO4mxtoBu+0wRDTgRlNZ0DE9R3jkeRY1oN5c7wlkv1soNRRVRr+tMAmgncUnMxc 8Pe4BtSrT0lAD18yNyWguxSiubnSKJ6jBKUeI+jMEUOPpoxVSGsKzWio1J9X0W2XEhqy Xca3aheY41gFHSG6Su5N/GWf7wc9g2tq5I0dXISj2O1kkI50A+seIX+Zyl63aQ0LEBIJ KBzY6f/FZ0k3EKno2JN/AmeTNGYCJedF/eFu8k37tDYXze5GvEla3HWCb5I1YAw84pkM 6Q3sUsM5/gi7GbIezqbLdMmsGKagoazHaGTwnKd1GxDf50w1qVsbVKYa3F5dpyPG573G hyHw== X-Gm-Message-State: ALoCoQnjiAQY9MyJ4VOlvpSo3LYoq1rnu4W89M6zh6+Ud2sngsGISX5AIaYPDMJUWfzZSR7WRBRF X-Received: by 10.236.157.193 with SMTP id o41mr614503yhk.6.1407885679501; Tue, 12 Aug 2014 16:21:19 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id y50si10971yhk.4.2014.08.12.16.21.19 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 12 Aug 2014 16:21:19 -0700 (PDT) Received: from tictac.mtv.corp.google.com (tictac.mtv.corp.google.com [172.22.162.15]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id 399D15A4629; Tue, 12 Aug 2014 16:21:19 -0700 (PDT) Received: by tictac.mtv.corp.google.com (Postfix, from userid 121310) id C8A2C80AA5; Tue, 12 Aug 2014 16:21:18 -0700 (PDT) From: Doug Anderson To: Heiko Stuebner , Seungwon Jeon , Jaehoon Chung , Chris Ball , Ulf Hansson Cc: Addy Ke , Kever Yang , Sonny Rao , linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, Arnd Bergmann , Doug Anderson , robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/2] ARM: dts: Enable emmc and sdmmc on the rk3288-evb boards Date: Tue, 12 Aug 2014 16:21:14 -0700 Message-Id: <1407885674-16469-3-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1407885674-16469-1-git-send-email-dianders@chromium.org> References: <1407885674-16469-1-git-send-email-dianders@chromium.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This enables basic SD and eMMC support. Things are not yet running at the fastest speed and we don't have the regulators specified, but we can at least use the eMMC and SD cards now. A note: * Though MMC DDR50 mode is partially supported in the dw_mmc rk3288-specific code in Addy's patch, Addy's patch doesn't add tuning support. That means DDR50 mode is not reliable. From the 3288 TRM: "Tuning is required for other speed modes-such as DDR50-even though the output delay from the card is less than one cycle." Thus, we don't enable MMC DDR50 mode in this patch. Signed-off-by: Doug Anderson Acked-by: Arnd Bergmann --- Changes in v4: - Squashed patches #2 and #3 since Jaehoon's patch landed. Changes in v3: - Removed DDR50 mode since it needs tuning, which isn't there yet. Changes in v2: - Squashed in the DDR50 mode since Addy spun his patch. - New patchwork link for Addy's patch - Refer to the new title of Jaehoon's patch arch/arm/boot/dts/rk3288-evb.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index 4f57209..ebce49a 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -49,6 +49,30 @@ }; }; +&emmc { + broken-cd; + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; /* wp not hooked up */ + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; +}; + &i2c0 { status = "okay"; };