From patchwork Tue Aug 19 12:59:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Barry Song <21cnbao@gmail.com> X-Patchwork-Id: 4742731 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C8F9D9F375 for ; Tue, 19 Aug 2014 12:59:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BE598200F4 for ; Tue, 19 Aug 2014 12:59:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6D4CE200E9 for ; Tue, 19 Aug 2014 12:59:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752087AbaHSM7m (ORCPT ); Tue, 19 Aug 2014 08:59:42 -0400 Received: from mail-pa0-f51.google.com ([209.85.220.51]:61219 "EHLO mail-pa0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751528AbaHSM7m (ORCPT ); Tue, 19 Aug 2014 08:59:42 -0400 Received: by mail-pa0-f51.google.com with SMTP id ey11so9720633pad.24 for ; Tue, 19 Aug 2014 05:59:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=k6PbBS6b1jdmMgSgmOwTqM48f+1fOHfMS1w1MuQiPSo=; b=h2ss13zpwlwW8cHyI9LxUdarlPuzFzsoLkII7kQm4FhdGaubgqobcl/sgcc32GGBei yfwn3zZf1H5HDHHzgAl0GJfTndARe/GgNj/zClcrvdxp6C8fs9VJopTVMfvNFueHMh0w Qh73yRSVVPLIqfWzH78S2z1YUvetwTl7yHmZAzc+qXYVemUe23s2KLNeYgGJ+ZWDaJYF XATAMCGGfutiforhHx8I4j5hcCqJ8/Un4SfNmIMrV/qAIhWRzLVeSvsxK1IqReKTYy27 mHRdtVQGdDA0hboTBtOYLSKhiqpZLklmKpGkpXELGSvj/WrduVMHWNHaOJDj3Xt1qjlI 52UQ== X-Received: by 10.68.68.225 with SMTP id z1mr43404890pbt.110.1408453176195; Tue, 19 Aug 2014 05:59:36 -0700 (PDT) Received: from localhost.localdomain ([211.161.197.202]) by mx.google.com with ESMTPSA id mm9sm10342042pbc.48.2014.08.19.05.59.31 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 19 Aug 2014 05:59:35 -0700 (PDT) From: Barry Song <21cnbao@gmail.com> To: ulf.hansson@linaro.org, chris@printf.net Cc: linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, workgroup.linux@csr.com, Minda Chen , Barry Song Subject: [PATCH v2] mmc: sdhci-sirf: fix 8bit width enable by overwriting set_bus_width Date: Tue, 19 Aug 2014 20:59:13 +0800 Message-Id: <1408453153-8125-1-git-send-email-21cnbao@gmail.com> X-Mailer: git-send-email 1.7.9.5 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Minda Chen 8bit-width enable bit of CSR MMC hosts is 3, while stardard hosts use bit 5. this patch fixes the functionality of 8bit transfer in CSR mmc controllers and improve performance for mmc0 a lot. Signed-off-by: Minda Chen Signed-off-by: Barry Song Signed-off-by: Romain Izard Reviewed-by: Romain Izard --- -v2: check for host->version >= SDHCI_SPEC_300 drivers/mmc/host/sdhci-sirf.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c index 1700453..a7224e5 100644 --- a/drivers/mmc/host/sdhci-sirf.c +++ b/drivers/mmc/host/sdhci-sirf.c @@ -15,6 +15,8 @@ #include #include "sdhci-pltfm.h" +#define SDHCI_SIRF_8BITBUS BIT(3) + struct sdhci_sirf_priv { struct clk *clk; int gpio_cd; @@ -27,10 +29,34 @@ static unsigned int sdhci_sirf_get_max_clk(struct sdhci_host *host) return clk_get_rate(priv->clk); } +static void sdhci_sirf_set_bus_width(struct sdhci_host *host, int width) +{ + u8 ctrl; + + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); + if (width == MMC_BUS_WIDTH_8) { + ctrl &= ~SDHCI_CTRL_4BITBUS; + /* + * 8bit-width enable bit of CSR MMC hosts is 3, + * while stardard hosts use bit 5 + */ + if (host->version >= SDHCI_SPEC_300) + ctrl |= SDHCI_SIRF_8BITBUS; + } else { + if (host->version >= SDHCI_SPEC_300) + ctrl &= ~SDHCI_SIRF_8BITBUS; + if (width == MMC_BUS_WIDTH_4) + ctrl |= SDHCI_CTRL_4BITBUS; + else + ctrl &= ~SDHCI_CTRL_4BITBUS; + } + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); +} + static struct sdhci_ops sdhci_sirf_ops = { .set_clock = sdhci_set_clock, .get_max_clock = sdhci_sirf_get_max_clk, - .set_bus_width = sdhci_set_bus_width, + .set_bus_width = sdhci_sirf_set_bus_width, .reset = sdhci_reset, .set_uhs_signaling = sdhci_set_uhs_signaling, };