From patchwork Fri Aug 22 04:54:55 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 4761321 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CE47CC0338 for ; Fri, 22 Aug 2014 04:56:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0A82B2017A for ; Fri, 22 Aug 2014 04:56:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 10E7C20179 for ; Fri, 22 Aug 2014 04:56:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751869AbaHVE4I (ORCPT ); Fri, 22 Aug 2014 00:56:08 -0400 Received: from mail-pa0-f47.google.com ([209.85.220.47]:56384 "EHLO mail-pa0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755857AbaHVEzM (ORCPT ); Fri, 22 Aug 2014 00:55:12 -0400 Received: by mail-pa0-f47.google.com with SMTP id kx10so15534850pab.34 for ; Thu, 21 Aug 2014 21:55:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3EXghVLQAKu4e+eVW1HT1x1oNPl6AbQ/5jKvZYMchj0=; b=VC06eKO16OuARDEcV2YXonsFYuYV674jXfTuzsWOhIS5wOB4XtEgVCuwIgbj8VX4bN Np18YnuBF/GW6KRwrhKzEEmsrs5n2sMG14wEVg6jk/Nav56vIr2kv78JcB6CQlFEKSn9 Kb6LmhKItJJoctz6k8YaQgYa6tggkyDzLkCi+Hz5HyqgNy7lcQtpX3SZhB7dDfI4b3US 6VWCP0HIWB5gFMT+RF2MS0XSbyRozdm4RGVMGq6lDK9PgozbaB4XDpYXVgUtfVEPrSdd +S/Y6yDWg3abZ+5RiBdcBoMCK5AV6A0M0gFXIixqWz+U6QXcU3kE2M5pVR0lkengteVu +QyA== X-Gm-Message-State: ALoCoQmtMIwFnbjI92EThQSpwBDPbvVE5RFrMlt/44mMoiHJeiauNwem4ypQ0wJ3voPxe622EPsj X-Received: by 10.68.65.101 with SMTP id w5mr3341828pbs.5.1408683311607; Thu, 21 Aug 2014 21:55:11 -0700 (PDT) Received: from localhost.localdomain ([117.198.85.175]) by mx.google.com with ESMTPSA id gs2sm27222005pbc.20.2014.08.21.21.55.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Aug 2014 21:55:10 -0700 (PDT) From: Srinivas Kandagatla To: linux-mmc@vger.kernel.org Cc: Linus Walleij , Chris Ball , Ulf Hansson , Russell King , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v3 2/3] mmc: mmci: Add sdio enable mask in variant data Date: Fri, 22 Aug 2014 05:54:55 +0100 Message-Id: <1408683295-8030-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1408683219-7939-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1408683219-7939-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds sdio enable mask in variant data, SOCs like ST have special bits in datactrl register to enable sdio. Unconditionally setting this bit in this driver breaks other SOCs like Qualcomm which maps this bits to something else, so making this enable bit to come from variant data solves the issue. Originally the issue is detected while testing WLAN ath6kl on Qualcomm APQ8064. Reviewed-by: Linus Walleij Signed-off-by: Srinivas Kandagatla --- drivers/mmc/host/mmci.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 533ad2b..a25759e 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -67,6 +67,7 @@ static unsigned int fmax = 515633; * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl * register + * @datactrl_mask_sdio: SDIO enable mask in datactrl register * @pwrreg_powerup: power up value for MMCIPOWER register * @f_max: maximum clk frequency supported by the controller. * @signal_direction: input/out direction of bus signals can be indicated @@ -89,6 +90,7 @@ struct variant_data { unsigned int fifohalfsize; unsigned int data_cmd_enable; unsigned int datactrl_mask_ddrmode; + unsigned int datactrl_mask_sdio; bool sdio; bool st_clkdiv; bool blksz_datactrl16; @@ -138,6 +140,7 @@ static struct variant_data variant_u300 = { .clkreg_enable = MCI_ST_U300_HWFCEN, .clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS, .datalength_bits = 16, + .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, .sdio = true, .pwrreg_powerup = MCI_PWR_ON, .f_max = 100000000, @@ -151,6 +154,7 @@ static struct variant_data variant_nomadik = { .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, .datalength_bits = 24, + .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, .sdio = true, .st_clkdiv = true, .pwrreg_powerup = MCI_PWR_ON, @@ -168,6 +172,7 @@ static struct variant_data variant_ux500 = { .clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS, .clkreg_neg_edge_enable = MCI_ST_UX500_NEG_EDGE, .datalength_bits = 24, + .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, .sdio = true, .st_clkdiv = true, .pwrreg_powerup = MCI_PWR_ON, @@ -187,6 +192,7 @@ static struct variant_data variant_ux500v2 = { .clkreg_neg_edge_enable = MCI_ST_UX500_NEG_EDGE, .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, .datalength_bits = 24, + .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, .sdio = true, .st_clkdiv = true, .blksz_datactrl16 = true, @@ -812,16 +818,10 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) if (data->flags & MMC_DATA_READ) datactrl |= MCI_DPSM_DIRECTION; - /* The ST Micro variants has a special bit to enable SDIO */ if (variant->sdio && host->mmc->card) if (mmc_card_sdio(host->mmc->card)) { - /* - * The ST Micro variants has a special bit - * to enable SDIO. - */ u32 clk; - - datactrl |= MCI_ST_DPSM_SDIOEN; + datactrl |= variant->datactrl_mask_sdio; /* * The ST Micro variant for SDIO small write transfers