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[4/4] mmc: dw_mmc: fixed wrong condtion checking.

Message ID 1409894100-4713-5-git-send-email-jh80.chung@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Jaehoon Chung Sept. 5, 2014, 5:15 a.m. UTC 
DDR mode can use  with 4bit or 8bit buswidth.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
---
 drivers/mmc/host/dw_mmc-exynos.c |    3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
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Patch

diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index aee39bc..0884df6 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -190,8 +190,7 @@  static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios)
 	if (ios->timing == MMC_TIMING_MMC_DDR52) {
 		mci_writel(host, CLKSEL, priv->ddr_timing);
 		/* Should be double rate for DDR mode */
-		if (ios->bus_width == MMC_BUS_WIDTH_8)
-			wanted <<= 1;
+		wanted <<= 1;
 	} else {
 		mci_writel(host, CLKSEL, priv->sdr_timing);
 	}