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[3/3] mmc: sdhci-acpi: Fix Braswell eMMC timeout clock frequency

Message ID 1412598187-5263-4-git-send-email-adrian.hunter@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Adrian Hunter Oct. 6, 2014, 12:23 p.m. UTC
Braswell eMMC host controller specifies an incorrect
timeout clock frequncy in the capabilities registers.
The correct value is 1 MHz.  A similar fix was done
for sdhci-pci, however in the sdhci-acpi case the
HID/UID is not unique so the capabilities register
values are matched also.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/mmc/host/sdhci-acpi.c | 5 +++++
 1 file changed, 5 insertions(+)
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Patch

diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
index 7548261..9cccc0e 100644
--- a/drivers/mmc/host/sdhci-acpi.c
+++ b/drivers/mmc/host/sdhci-acpi.c
@@ -137,6 +137,11 @@  static int sdhci_acpi_emmc_probe_slot(struct platform_device *pdev,
 
 	/* Platform specific code during emmc proble slot goes here */
 
+	if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
+	    sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
+	    sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
+		host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
+
 	return 0;
 }