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Wed, 26 Nov 2014 08:44:34 -0800 X-AuditID: ac160a68-f79d16d0000019a2-58-54760371b8ba Received: from E6410-C110490.sdcorp.global.sandisk.com ( [10.177.8.100]) by milsmgip11.sandisk.com (Symantec Messaging Gateway) with SMTP id 0E.B9.10458.07306745; Wed, 26 Nov 2014 08:44:33 -0800 (PST) From: Alex Lemberg To: CC: , , , Alex Lemberg Subject: [PATCH v3] mmc: Add Production State Awareness Support Date: Wed, 26 Nov 2014 18:44:29 +0200 Message-ID: <1417020269-3993-1-git-send-email-alex.lemberg@sandisk.com> X-Mailer: git-send-email 2.1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrLLMWRmVeSWpSXmKPExsWyRoxnkW4hc1mIwYQ+Q4sJl7czWhz5389o cXxtuAOzx51re9g8brxayOTxeZNcAHMUl01Kak5mWWqRvl0CV8bOK5fZCm6qVExp387WwPhY touRk0NCwETieMdZRghbTOLCvfVsXYxcHEICJxgl5jxbyASSEBLYwSjRcCwBpqFv6xFGiKIz jBLTl25lAUmwCehKvPjwFCjBwSEiICPReMAYJMwsUCdx7OFPdhBbWMBe4ve7HWAzWQRUJXpf v2QFsXkF3CV2rP4CdYScxIbd/8HmSwh8YpFom7GCHaJIUOLkzCcsEEMlJA6+eMEMsksIaNDZ t3UTGAVnIamahaRqASPTKkax3Myc4tz01AJDQ73ixLyUzOJsveT83E2M4EDlytjBuHWS+SFG AQ5GJR7eA6WlIUKsiWXFlbmHGCU4mJVEeDneAYV4UxIrq1KL8uOLSnNSiw8xSnOwKInz2s/L 8hcSSE8sSc1OTS1ILYLJMnFwSjUwJrH62rGf0/8ozLc598ScN4HSsv/iNtrk/LKoXD/7/0qL X+fv7lNfesMt8t4rMb7OPRLV2va8/McyjJMyLdezHXhU/9rfWGX53d0/s9rFPLUWHEiaamj9 Jfotv+Ju5iMKAscXeFdclyhcPeVxXwiTqNKav2+aT/2XWHlVL9327cn0OxLc4n9+KLEUZyQa ajEXFScCAMdW5HBQAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprMJMWRmVeSWpSXmKPExsXCtZEjRbeQuSzEYM4NRYubD36wWezcu47J YsLl7YwWR/73M1ocXxvuwOpx59oeNo8brxYyeUxbc57J4/MmuQCWKC6blNSczLLUIn27BK6M nVcusxXcVKmY0r6drYHxsWwXIyeHhICJRN/WI4wQtpjEhXvr2boYuTiEBE4xSlxsXskGkmAT 0JV48eEpWJGIgJREz9Nm5i5GDg5mgRqJKzczQcLCAvYSv9/tYAKxWQRUJXpfv2QFsXkF3CVW /3jNDjFfTmLD7v+MExi5FjAyrGIUy83MKc5NzywwNNQrTsxLySzO1kvOz93ECPY2Z+QOxqcT zQ8xMnFwSjUwzpz22zSlbvJyf71fJwPNqs/kyiRJ2EXOcbkVUnZ8jlfozqm8b6wjL5/Vehyg dFYmNYHD89GuIxKHMn+EfZdILZD5neam5rWK3eqnmlTkwSU9n9b7X94YOnlaVvwlrien0r47 dtSmtL6Sn7IuPe/c4kkzt7Ff5rX4fYVx9s+MoMml/tHhblNClFiKMxINtZiLihMBxPkmOqYB AAA= MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:63.163.107.172; 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client-ip=63.163.107.172; helo=milsmgep11.sandisk.com; Authentication-Results: spf=pass (sender IP is 63.163.107.172) smtp.mailfrom=Alex.Lemberg@sandisk.com; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:BN1PR02MB118; X-OriginatorOrg: sandisk.com Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In this patch driver should recognize if eMMC device (Rev >=5.0) was left in PRE_SOLDERING_POST_WRITES (0x02) state, and switch it to NORMAL (0x00). PRE_SOLDERING_POST_WRITES (0x02) state - represents a state where the device is in production process and the host (usually programmer) completed loading the content to the device. The host (usually programmer) sets the device to this state after loading the content and just before soldering. After soldering the device to the real host (not programmer), the device should be switched to NORMAL (0x00) mode. The NORMAL (0x00) mode of PSA register represents a state in which the device is running in the field and uses regular operations. Leaving device in PRE_SOLDERING_POST_WRITES (0x02) might cause unexpected behaviour of eMMC device. More details about PSA feature can be found in eMMC5.0 JEDEC spec (JESD84-B50.pdf): http://www.jedec.org/standards-documents/technology-focus-areas/flash-memory-ssds-ufs-emmc/e-mmc Signed-off-by: Alex Lemberg --- Changes in v2: - Remove typo in patch code Changes in v3: - Move ext_csd revision check --- drivers/mmc/core/mmc.c | 28 ++++++++++++++++++++++++++++ include/linux/mmc/card.h | 2 ++ include/linux/mmc/mmc.h | 8 ++++++++ 3 files changed, 38 insertions(+) diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 02ad792..2c523ca 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -571,6 +571,16 @@ static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd) card->ext_csd.ffu_capable = (ext_csd[EXT_CSD_SUPPORTED_MODE] & 0x1) && !(ext_csd[EXT_CSD_FW_CONFIG] & 0x1); + card->ext_csd.psa = + ext_csd[EXT_CSD_PSA]; + if (ext_csd[EXT_CSD_PSA_TIMEOUT] > 0) { + card->ext_csd.psa_timeout = + 100 * + (1 << ext_csd[EXT_CSD_PSA_TIMEOUT]); + } else { + pr_warn("%s: EXT_CSD PSA Timeout is zero\n", + mmc_hostname(card->host)); + } } out: return err; @@ -1358,6 +1368,24 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, } /* + * eMMC v5.0 or later + * and Production State Awareness state is + * EXT_CSD_PSA_POST_SOLDERING_WRITES (0x02) + * The host should set the device to NORMAL mode + */ + if ((card->ext_csd.rev >= 7) && + (card->ext_csd.psa == EXT_CSD_PSA_POST_SOLDERING_WRITES)) { + unsigned int timeout; + + timeout = DIV_ROUND_UP(card->ext_csd.psa_timeout, 1000); + card->ext_csd.psa = EXT_CSD_PSA_NORMAL; + err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_PSA, card->ext_csd.psa, timeout); + if (err && err != -EBADMSG) + goto free_card; + } + + /* * If enhanced_area_en is TRUE, host needs to enable ERASE_GRP_DEF * bit. This bit will be lost every time after a reset or power off. */ diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index 4d69c00..09ac3b0 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -60,9 +60,11 @@ struct mmc_ext_csd { u8 packed_event_en; unsigned int part_time; /* Units: ms */ unsigned int sa_timeout; /* Units: 100ns */ + unsigned int psa_timeout; /* Units: 100us */ unsigned int generic_cmd6_time; /* Units: 10ms */ unsigned int power_off_longtime; /* Units: ms */ u8 power_off_notification; /* state */ + u8 psa; /* production state awareness */ unsigned int hs_max_dtr; unsigned int hs200_max_dtr; #define MMC_HIGH_26_MAX_DTR 26000000 diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h index 49ad7a9..458814d 100644 --- a/include/linux/mmc/mmc.h +++ b/include/linux/mmc/mmc.h @@ -285,6 +285,7 @@ struct _mmc_csd { #define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */ #define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */ #define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */ +#define EXT_CSD_PSA 133 /* R/W/E */ #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ #define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */ #define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */ @@ -315,6 +316,7 @@ struct _mmc_csd { #define EXT_CSD_PWR_CL_26_360 203 /* RO */ #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ #define EXT_CSD_S_A_TIMEOUT 217 /* RO */ +#define EXT_CSD_PSA_TIMEOUT 218 /* RO */ #define EXT_CSD_REL_WR_SEC_C 222 /* RO */ #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ #define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */ @@ -433,6 +435,12 @@ struct _mmc_csd { #define EXT_CSD_BKOPS_LEVEL_2 0x2 /* + * PRODUCTION STATE AWARENESS fields + */ +#define EXT_CSD_PSA_NORMAL 0x00 +#define EXT_CSD_PSA_POST_SOLDERING_WRITES 0x02 + +/* * MMC_SWITCH access modes */