From patchwork Wed Jan 21 09:32:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 5675881 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 353929F2ED for ; Wed, 21 Jan 2015 09:32:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5BAD020527 for ; Wed, 21 Jan 2015 09:32:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6159E20520 for ; Wed, 21 Jan 2015 09:32:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752322AbbAUJcb (ORCPT ); Wed, 21 Jan 2015 04:32:31 -0500 Received: from down.free-electrons.com ([37.187.137.238]:34954 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751501AbbAUJc1 (ORCPT ); Wed, 21 Jan 2015 04:32:27 -0500 Received: by mail.free-electrons.com (Postfix, from userid 106) id EADBD3D7; Wed, 21 Jan 2015 10:32:25 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (von69-1-88-162-9-206.fbx.proxad.net [88.162.9.206]) by mail.free-electrons.com (Postfix) with ESMTPSA id 75214278; Wed, 21 Jan 2015 10:32:25 +0100 (CET) From: Gregory CLEMENT To: Chris Ball , Ulf Hansson , linux-mmc@vger.kernel.org, Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory CLEMENT Cc: Thomas Petazzoni , Ezequiel Garcia , linux-arm-kernel@lists.infradead.org, Maxime Ripard , Boris BREZILLON , Lior Amsalem , Tawfik Bayouk , Nadav Haklai , Mark Rutland , devicetree@vger.kernel.org, Subject: [PATCH 1/7] mmc: sdhci-pxav3: Fix SDR50 and DDR50 capabilities for the Armada 38x flavor Date: Wed, 21 Jan 2015 10:32:00 +0100 Message-Id: <1421832726-21656-2-git-send-email-gregory.clement@free-electrons.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1421832726-21656-1-git-send-email-gregory.clement@free-electrons.com> References: <1421832726-21656-1-git-send-email-gregory.clement@free-electrons.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to erratum 'FE-2946959' both SDR50 and DDR50 modes require specific clock adjustments in SDIO3 Configuration register. However, this register was not part of the device tree binding. Even if the binding can (and will) be extended we still need handling the case where this register was not available. In this case we use the SDHCI_QUIRK_MISSING_CAPS quirk remove them from the capabilities. Fixes: 5491ce3f79ee ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller") Cc: # v3.15+ Signed-off-by: Gregory CLEMENT --- drivers/mmc/host/sdhci-pxav3.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c index ca3424e7ef71..7b07325b4fba 100644 --- a/drivers/mmc/host/sdhci-pxav3.c +++ b/drivers/mmc/host/sdhci-pxav3.c @@ -118,6 +118,20 @@ static int mv_conf_mbus_windows(struct platform_device *pdev, return 0; } +static int armada_38x_quirks(struct sdhci_host *host) +{ + host->quirks |= SDHCI_QUIRK_MISSING_CAPS; + /* + * According to erratum 'FE-2946959' both SDR50 and DDR50 + * modes require specific clock adjustments in SDIO3 + * Configuration register, if the adjustment is not done, + * remove them from the capabilities. + */ + host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); + host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_DDR50); + return 0; +} + static void pxav3_reset(struct sdhci_host *host, u8 mask) { struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); @@ -319,6 +333,9 @@ static int sdhci_pxav3_probe(struct platform_device *pdev) clk_prepare_enable(pxa->clk_core); if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) { + ret = armada_38x_quirks(host); + if (ret < 0) + goto err_quirks; ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info()); if (ret < 0) goto err_mbus_win; @@ -400,6 +417,7 @@ err_mbus_win: if (!IS_ERR(pxa->clk_core)) clk_disable_unprepare(pxa->clk_core); err_clk_get: +err_quirks: sdhci_pltfm_free(pdev); return ret; }