From patchwork Fri Apr 10 09:40:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 6194031 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 75859BF4A6 for ; Fri, 10 Apr 2015 09:43:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 743B42037E for ; Fri, 10 Apr 2015 09:43:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 61E362012B for ; Fri, 10 Apr 2015 09:43:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932337AbbDJJni (ORCPT ); Fri, 10 Apr 2015 05:43:38 -0400 Received: from mail-wi0-f178.google.com ([209.85.212.178]:38516 "EHLO mail-wi0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932229AbbDJJkp (ORCPT ); Fri, 10 Apr 2015 05:40:45 -0400 Received: by wiun10 with SMTP id n10so19743600wiu.1 for ; Fri, 10 Apr 2015 02:40:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JslENqhh8Hkztw8FRZnMg/NOzTB4ZOjQD3Yo8kXkqK0=; b=USzm7l3hzlMuL6mxVgaf4o6PxV4HM87X1E/H0TlPpyZNrkmwQ3h8NMl4iLZ2JqF8G9 bVSI72+Bo+JDnoZ2ioQ6mPVaXzs+DUVgc4hypq38k5UhLpQS2VUp2hUiY56kKoNgdXYc EhGMFLaqFLI+WwpG+1eKKuVZkQuKnTE8VyUQ9RQMUBdKQp4tf5KWtdtoBx9MyClT/aAS czQ3ZqJNYXVZc38YnDrimhW9iIsV4PUacEYQpqkyDJWiqG50OJ3QyUaJXquRDSw+8aVW I49+REjqOftrZH0Wg/XvR9y3v37W1d7XvGbMcSfT+HjXm2agb1jZOkdpY9IXVmNhhQB6 IkvA== X-Gm-Message-State: ALoCoQkXbF7JOjsZ1NFgG9QO8gDHPUjfLpi0sYY5NbKjk2zvWLkGNN38jGFG0G9TzJ2ygtwp8Mxx X-Received: by 10.180.202.228 with SMTP id kl4mr3253794wic.66.1428658844258; Fri, 10 Apr 2015 02:40:44 -0700 (PDT) Received: from localhost.localdomain ([31.105.225.148]) by mx.google.com with ESMTPSA id l1sm23993381wiy.20.2015.04.10.02.40.42 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 10 Apr 2015 02:40:43 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, maxime.coquelin@st.com, patrice.chotard@st.com, ulf.hansson@linaro.org, peppe.cavallaro@st.com Cc: peter.griffin@linaro.org, lee.jones@linaro.org, devicetree@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCH v5 2/9] mmc: sdhci-st: Add support for de-asserting reset signal and top regs resource Date: Fri, 10 Apr 2015 10:40:24 +0100 Message-Id: <1428658831-14308-3-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1428658831-14308-1-git-send-email-peter.griffin@linaro.org> References: <1428658831-14308-1-git-send-email-peter.griffin@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP STiH407 family SoC's can have a reset signal for the controller which needs to be managed. Also the eMMC controller has some additional 'top' memory mapped registers which are used to manage the dynamic and static delay required for UHS modes. This patch adds support for creating the mapping, which will be used by subsequent patches. Signed-off-by: Peter Griffin Signed-off-by: Giuseppe Cavallaro Acked-by: Maxime Coquelin --- drivers/mmc/host/sdhci-st.c | 60 ++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 57 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-st.c b/drivers/mmc/host/sdhci-st.c index a80de93..74213b0 100644 --- a/drivers/mmc/host/sdhci-st.c +++ b/drivers/mmc/host/sdhci-st.c @@ -23,9 +23,14 @@ #include #include #include - +#include #include "sdhci-pltfm.h" +struct st_mmc_platform_data { + struct reset_control *rstc; + void __iomem *top_ioaddr; +}; + /* MMCSS glue logic to setup the HC on some ST SoCs (e.g. STiH407 family) */ #define ST_MMC_CCONFIG_REG_1 0x400 @@ -151,10 +156,16 @@ static const struct sdhci_pltfm_data sdhci_st_pdata = { static int sdhci_st_probe(struct platform_device *pdev) { struct sdhci_host *host; + struct st_mmc_platform_data *pdata; struct sdhci_pltfm_host *pltfm_host; struct clk *clk; int ret = 0; u16 host_version; + struct resource *res; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; clk = devm_clk_get(&pdev->dev, "mmc"); if (IS_ERR(clk)) { @@ -162,10 +173,17 @@ static int sdhci_st_probe(struct platform_device *pdev) return PTR_ERR(clk); } + pdata->rstc = devm_reset_control_get(&pdev->dev, NULL); + if (IS_ERR(pdata->rstc)) + pdata->rstc = NULL; + else + reset_control_deassert(pdata->rstc); + host = sdhci_pltfm_init(pdev, &sdhci_st_pdata, 0); if (IS_ERR(host)) { dev_err(&pdev->dev, "Failed sdhci_pltfm_init\n"); - return PTR_ERR(host); + ret = PTR_ERR(host); + goto err_pltfm_init; } ret = mmc_of_parse(host->mmc); @@ -176,7 +194,17 @@ static int sdhci_st_probe(struct platform_device *pdev) clk_prepare_enable(clk); + /* Configure the FlashSS Top registers for setting eMMC TX/RX delay */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + "top-mmc-delay"); + pdata->top_ioaddr = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(pdata->top_ioaddr)) { + dev_warn(&pdev->dev, "FlashSS Top Dly registers not available"); + pdata->top_ioaddr = NULL; + } + pltfm_host = sdhci_priv(host); + pltfm_host->priv = pdata; pltfm_host->clk = clk; ret = sdhci_add_host(host); @@ -200,6 +228,24 @@ err_out: clk_disable_unprepare(clk); err_of: sdhci_pltfm_free(pdev); +err_pltfm_init: + if (pdata->rstc) + reset_control_assert(pdata->rstc); + + return ret; +} + +static int sdhci_st_remove(struct platform_device *pdev) +{ + struct sdhci_host *host = platform_get_drvdata(pdev); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct st_mmc_platform_data *pdata = pltfm_host->priv; + int ret; + + ret = sdhci_pltfm_unregister(pdev); + + if (pdata->rstc) + reset_control_assert(pdata->rstc); return ret; } @@ -209,11 +255,15 @@ static int sdhci_st_suspend(struct device *dev) { struct sdhci_host *host = dev_get_drvdata(dev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct st_mmc_platform_data *pdata = pltfm_host->priv; int ret = sdhci_suspend_host(host); if (ret) goto out; + if (pdata->rstc) + reset_control_assert(pdata->rstc); + clk_disable_unprepare(pltfm_host->clk); out: return ret; @@ -223,9 +273,13 @@ static int sdhci_st_resume(struct device *dev) { struct sdhci_host *host = dev_get_drvdata(dev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct st_mmc_platform_data *pdata = pltfm_host->priv; clk_prepare_enable(pltfm_host->clk); + if (pdata->rstc) + reset_control_deassert(pdata->rstc); + return sdhci_resume_host(host); } #endif @@ -241,7 +295,7 @@ MODULE_DEVICE_TABLE(of, st_sdhci_match); static struct platform_driver sdhci_st_driver = { .probe = sdhci_st_probe, - .remove = sdhci_pltfm_unregister, + .remove = sdhci_st_remove, .driver = { .name = "sdhci-st", .pm = &sdhci_st_pmops,