From patchwork Fri May 1 01:46:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhangfei Gao X-Patchwork-Id: 6307781 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 041E49F326 for ; Fri, 1 May 2015 01:47:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 38C4D201BC for ; Fri, 1 May 2015 01:47:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5216220165 for ; Fri, 1 May 2015 01:47:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753242AbbEABrP (ORCPT ); Thu, 30 Apr 2015 21:47:15 -0400 Received: from mail-pa0-f52.google.com ([209.85.220.52]:35484 "EHLO mail-pa0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752958AbbEABrO (ORCPT ); Thu, 30 Apr 2015 21:47:14 -0400 Received: by pabtp1 with SMTP id tp1so77129522pab.2 for ; Thu, 30 Apr 2015 18:47:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Xq4yVm1KU9CJQPjI4uqD8p5J3/TJownk8p/uUMBZjtM=; b=PFBcx+04H0vKlDx4t60MP//DsfygVhjJEmW0zRWBhNipO7FXHZoyHQdE71M2Hzc6l7 qtv1mXE9cbjzTA3PVvTftZ+itim37tWdYkAXwbGvaQDmRBZZZp2aBNJ6tAfjYlz1U+Xz 3psSSPky9+htFsKt0m18VGZ/2YlRzS4Ei2p/Ka33BJzvvhfU4+MwAgaF1JhGaGZ5XwZ3 AMnTZRfTa01ZKMgFcu6Pj4Jq1DtmuhlyWE2x2dcYIFL6xI7LoNLbQKctQvjkvpNwuvrm CwENF64C0U8mjnMKoPVDwUSWb0lpF+IekRcGO/HUj6YxyOJftRhxMNc0tGMCCNFffNHh u3sA== X-Gm-Message-State: ALoCoQmnDf4MTtfB9L3JA/gpsqxi+Ios+7uNZKTqBFimanX1cIONFEdcsXpKfROBQhm6jlyJsIXA X-Received: by 10.68.69.69 with SMTP id c5mr13460787pbu.61.1430444834098; Thu, 30 Apr 2015 18:47:14 -0700 (PDT) Received: from localhost.localdomain ([180.150.153.56]) by mx.google.com with ESMTPSA id ef3sm3354503pbc.26.2015.04.30.18.47.10 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Apr 2015 18:47:13 -0700 (PDT) From: Zhangfei Gao To: Jaehoon Chung , Ulf Hansson Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Zhangfei Gao Subject: [PATCH 1/3] Document: dw_mmc-k3: add document of hi6220 mmc Date: Fri, 1 May 2015 09:46:56 +0800 Message-Id: <1430444818-7740-2-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430444818-7740-1-git-send-email-zhangfei.gao@linaro.org> References: <1430444818-7740-1-git-send-email-zhangfei.gao@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Zhangfei Gao --- .../devicetree/bindings/mmc/k3-dw-mshc.txt | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt index 3b35449..a353d0b 100644 --- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt @@ -13,6 +13,10 @@ Required Properties: * compatible: should be one of the following. - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. + - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. + +Optional Properties: +- hisilicon,peripheral-syscon: phandle of syscon used to control peripheral. Example: @@ -42,3 +46,49 @@ Example: cap-mmc-highspeed; cap-sd-highspeed; }; + + /* for Hi6220 */ + + /* SoC portion */ + dwmmc_0: dwmmc0@f723d000 { + compatible = "hisilicon,hi6220-dw-mshc"; + num-slots = <0x1>; + board-mmc-bus-clk = <0x0>; + reg = <0x0 0xf723d000 0x0 0x1000>; + interrupts = <0x0 0x48 0x4>; + clocks = <&clock_sys HI6220_MMC0_CIUCLK>, <&clock_sys HI6220_MMC0_CLK>; + clock-names = "ciu", "biu"; + }; + + dwmmc_1: dwmmc1@f723e000 { + compatible = "hisilicon,hi6220-dw-mshc"; + num-slots = <0x1>; + board-mmc-bus-clk = <0x0>; + card-detect-delay = <200>; + hisilicon,peripheral-syscon = <&ao_ctrl>; + reg = <0x0 0xf723e000 0x0 0x1000>; + interrupts = <0x0 0x49 0x4>; + clocks = <&clock_sys HI6220_MMC1_CIUCLK>, <&clock_sys HI6220_MMC1_CLK>; + clock-names = "ciu", "biu"; + }; + + /* Board portion */ + dwmmc_0: dwmmc0@f723d000 { + bus-width = <0x8>; + broken-cd; + vmmc-supply = <&ldo19>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_pmx_func &emmc_clk_cfg_func + &emmc_cfg_func &emmc_rst_cfg_func>; + }; + + dwmmc_1: dwmmc1@f723e000 { + bus-width = <0x4>; + disable-wp; + cd-gpios = <&gpio1 0 1>; + pinctrl-names = "default", "idle"; + pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; + pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; + vqmmc-supply = <&ldo7>; + vmmc-supply = <&ldo10>; + };