From patchwork Tue Aug 11 08:41:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Barry Song <21cnbao@gmail.com> X-Patchwork-Id: 6989701 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2DFE19F344 for ; Tue, 11 Aug 2015 08:34:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3BFBA20650 for ; Tue, 11 Aug 2015 08:34:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2E94D2064F for ; Tue, 11 Aug 2015 08:34:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755326AbbHKIev (ORCPT ); Tue, 11 Aug 2015 04:34:51 -0400 Received: from mail-pa0-f43.google.com ([209.85.220.43]:33699 "EHLO mail-pa0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752344AbbHKIet (ORCPT ); Tue, 11 Aug 2015 04:34:49 -0400 Received: by pabyb7 with SMTP id yb7so125537879pab.0 for ; Tue, 11 Aug 2015 01:34:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=RlIf62kTafwHEexbUcr8oHbzDSsc28aCcAoIFdNOxtg=; b=CM87mohgv6eezbPxtIRU4TWVI1B8t0VadndjPbi0S0PE5spL6vG2vl8iHOVR5N5GPa D8ZE6wGDSRuQqOKMd9+v09pQ4in2Vp/BczGFPL5GagHjSDR9I1G8aNE5FMn9U6OBlQsr w+mEWwFJXDMwfCDcll9BLZkD37r2tbPFRyQCUFMYo7Q6xsgAMWQd1ec3N3cbr0YZz8aO VjSFTfgAKEoRLIIqn+CyvmIKTEulA2+IvScw8icKaBLfVDL3/eeiGG6iOFGITonjGwkE GTGNZ4r4WJwIVAwMOYZ3Lvh/v+9fvQuIU1+wzh/od34S+WVsw7OY0zNTFuKCYjslRv/i 7N0g== X-Received: by 10.66.160.1 with SMTP id xg1mr53987330pab.27.1439282088568; Tue, 11 Aug 2015 01:34:48 -0700 (PDT) Received: from ip-172-31-29-47.ap-northeast-1.compute.internal (ec2-54-65-106-64.ap-northeast-1.compute.amazonaws.com. [54.65.106.64]) by smtp.gmail.com with ESMTPSA id da17sm1647174pac.29.2015.08.11.01.34.45 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 11 Aug 2015 01:34:47 -0700 (PDT) From: Barry Song <21cnbao@gmail.com> To: ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, workgroup.linux@csr.com, Weijun Yang , Barry Song Subject: [PATCH 1/2] mmc: core: enable CMD19 tuning for DDR50 mode Date: Tue, 11 Aug 2015 08:41:32 +0000 Message-Id: <1439282492-6274-1-git-send-email-21cnbao@gmail.com> X-Mailer: git-send-email 1.9.1 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Weijun Yang As SD Specifications Part1 Physical Layer Specification Version 3.01 says, CMD19 tuning is available for unlocked cards in transfer state of 1.8V signaling mode. The small difference between v3.00 and 3.01 spec means that CMD19 tuning is also available for DDR50 mode. Signed-off-by: Weijun Yang Signed-off-by: Barry Song --- drivers/mmc/core/sd.c | 1 + drivers/mmc/host/sdhci.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 4e7366a..a1ed24d 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -629,6 +629,7 @@ static int mmc_sd_init_uhs_card(struct mmc_card *card) */ if (!mmc_host_is_spi(card->host) && (card->sd_bus_speed == UHS_SDR50_BUS_SPEED || + card->sd_bus_speed == UHS_DDR50_BUS_SPEED || card->sd_bus_speed == UHS_SDR104_BUS_SPEED)) err = mmc_execute_tuning(card); out: diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 1dbe932..812c19b 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1891,6 +1891,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) break; case MMC_TIMING_UHS_SDR104: + case MMC_TIMING_UHS_DDR50: break; case MMC_TIMING_UHS_SDR50: