From patchwork Tue Oct 13 09:37:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chaotian Jing X-Patchwork-Id: 7382471 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3BB77BEEA4 for ; Tue, 13 Oct 2015 09:41:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6637320977 for ; Tue, 13 Oct 2015 09:41:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7F5F72096D for ; Tue, 13 Oct 2015 09:41:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932185AbbJMJjO (ORCPT ); Tue, 13 Oct 2015 05:39:14 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:47985 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752419AbbJMJiV (ORCPT ); Tue, 13 Oct 2015 05:38:21 -0400 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1305921260; Tue, 13 Oct 2015 17:38:19 +0800 Received: from mhfsdcap03.localdomain (10.17.3.153) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Tue, 13 Oct 2015 17:38:17 +0800 From: Chaotian Jing To: Ulf Hansson CC: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Matthias Brugger , Catalin Marinas , Will Deacon , Hans de Goede , Lars-Peter Clausen , Javier Martinez Canillas , Sascha Hauer , Howard Chen , Daniel Kurtz , Adrian Hunter , Kristina Martsenko , Sergei Shtylyov , , , , , , , Chaotian Jing Subject: [PATCH 2/4] mmc: dt-bindings: update Mediatek MMC bindings Date: Tue, 13 Oct 2015 17:37:56 +0800 Message-ID: <1444729078-26585-3-git-send-email-chaotian.jing@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1444729078-26585-1-git-send-email-chaotian.jing@mediatek.com> References: <1444729078-26585-1-git-send-email-chaotian.jing@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add 400Mhz clock source for HS400 mode Signed-off-by: Chaotian Jing --- Documentation/devicetree/bindings/mmc/mtk-sd.txt | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt index a1adfa4..745bee2 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt @@ -17,6 +17,11 @@ Required properties: - vmmc-supply: power to the Core - vqmmc-supply: power to the IO +Optional properties: +- clocks: 400mhz clock source for HS400 +- clock-names: "400mhz" +- hs400-ds-delay: HS400 DS delay setting + Examples: mmc0: mmc@11230000 { compatible = "mediatek,mt8173-mmc", "mediatek,mt8135-mmc"; @@ -24,9 +29,12 @@ mmc0: mmc@11230000 { interrupts = ; vmmc-supply = <&mt6397_vemc_3v3_reg>; vqmmc-supply = <&mt6397_vio18_reg>; - clocks = <&pericfg CLK_PERI_MSDC30_0>, <&topckgen CLK_TOP_MSDC50_0_H_SEL>; - clock-names = "source", "hclk"; + clocks = <&pericfg CLK_PERI_MSDC30_0>, + <&topckgen CLK_TOP_MSDC50_0_H_SEL>, + <&topckgen CLK_TOP_MSDCPLL_D2> ; + clock-names = "source", "hclk", "400mhz"; pinctrl-names = "default", "state_uhs"; pinctrl-0 = <&mmc0_pins_default>; pinctrl-1 = <&mmc0_pins_uhs>; + hs400-ds-delay = <0x14015>; };