From patchwork Tue Oct 27 06:24:26 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chaotian Jing X-Patchwork-Id: 7493941 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 54BA09F36A for ; Tue, 27 Oct 2015 06:27:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 76265206DF for ; Tue, 27 Oct 2015 06:27:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6DE73206DC for ; Tue, 27 Oct 2015 06:27:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754112AbbJ0G0z (ORCPT ); Tue, 27 Oct 2015 02:26:55 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:33629 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1753993AbbJ0GZS (ORCPT ); Tue, 27 Oct 2015 02:25:18 -0400 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1870886839; Tue, 27 Oct 2015 14:25:13 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Tue, 27 Oct 2015 14:25:11 +0800 From: Chaotian Jing To: Ulf Hansson CC: , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Matthias Brugger , Catalin Marinas , Will Deacon , Seungwon Jeon , Jaehoon Chung , Kukjin Kim , Krzysztof Kozlowski , Barry Song , Hans de Goede , Chaotian Jing , Lars-Peter Clausen , Javier Martinez Canillas , Sascha Hauer , Howard Chen , Adrian Hunter , Kristina Martsenko , Sergei Shtylyov , Stephen Boyd , Minda Chen , Dong Aisheng , Johan Derycke , Haibo Chen , Fabio Estevam , Georgi Djakov , , Weijun Yang , Kevin Hao , , , , , , Subject: [PATCH v3 06/10] mmc: mediatek: add implement of ops->hw_reset() Date: Tue, 27 Oct 2015 14:24:26 +0800 Message-ID: <1445927070-5102-7-git-send-email-chaotian.jing@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1445927070-5102-1-git-send-email-chaotian.jing@mediatek.com> References: <1445927070-5102-1-git-send-email-chaotian.jing@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP add implement of ops->hw_reset() for eMMC Signed-off-by: Chaotian Jing --- drivers/mmc/host/mtk-sd.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 3858163..5627644 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -64,6 +64,7 @@ #define SDC_RESP2 0x48 #define SDC_RESP3 0x4c #define SDC_BLK_NUM 0x50 +#define EMMC_IOCON 0x7c #define SDC_ACMD_RESP 0x80 #define MSDC_DMA_SA 0x90 #define MSDC_DMA_CTRL 0x98 @@ -1209,6 +1210,15 @@ end: pm_runtime_put_autosuspend(host->dev); } +static void msdc_hw_reset(struct mmc_host *mmc) +{ + struct msdc_host *host = mmc_priv(mmc); + + sdr_set_bits(host->base + EMMC_IOCON, 1); + udelay(10); /* 10us is enough */ + sdr_clr_bits(host->base + EMMC_IOCON, 1); +} + static struct mmc_host_ops mt_msdc_ops = { .post_req = msdc_post_req, .pre_req = msdc_pre_req, @@ -1216,6 +1226,7 @@ static struct mmc_host_ops mt_msdc_ops = { .set_ios = msdc_ops_set_ios, .start_signal_voltage_switch = msdc_ops_switch_volt, .card_busy = msdc_card_busy, + .hw_reset = msdc_hw_reset, }; static int msdc_drv_probe(struct platform_device *pdev)