From patchwork Wed Oct 12 02:55:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 9372009 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1D0E360487 for ; Wed, 12 Oct 2016 02:50:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 17D3D29192 for ; Wed, 12 Oct 2016 02:50:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0C61929198; Wed, 12 Oct 2016 02:50:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A02E529192 for ; Wed, 12 Oct 2016 02:50:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751972AbcJLCuG (ORCPT ); Tue, 11 Oct 2016 22:50:06 -0400 Received: from lucky1.263xmail.com ([211.157.147.132]:43254 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751171AbcJLCuG (ORCPT ); Tue, 11 Oct 2016 22:50:06 -0400 Received: from shawn.lin?rock-chips.com (unknown [192.168.167.11]) by lucky1.263xmail.com (Postfix) with ESMTP id 7195F6363A; Wed, 12 Oct 2016 10:49:39 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED4: 1 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 0D49B408; Wed, 12 Oct 2016 10:49:33 +0800 (CST) X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: jh80.chung@samsung.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: lintao@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 4400T3ALNH; Wed, 12 Oct 2016 10:49:36 +0800 (CST) From: Shawn Lin To: Jaehoon Chung , Ulf Hansson Cc: linux-mmc@vger.kernel.org, Doug Anderson , linux-rockchip@lists.infradead.org, Shawn Lin Subject: [PATCH v2 6/9] mmc: dw_mmc-exynos: deploy runtime PM facilities Date: Wed, 12 Oct 2016 10:55:55 +0800 Message-Id: <1476240955-5808-1-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1476240643-5701-1-git-send-email-shawn.lin@rock-chips.com> References: <1476240643-5701-1-git-send-email-shawn.lin@rock-chips.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Let's migrate it to use runtime PM and remove the system PM callback from this driver. With this patch, it could handle system PM properly and could also use runtime PM if we enable it. Signed-off-by: Shawn Lin --- Changes in v2: - minor fix since I change the argument for dw_mci_runtime_* drivers/mmc/host/dw_mmc-exynos.c | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 7ab3d74..e2439a1 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include "dw_mmc.h" @@ -161,20 +162,13 @@ static void dw_mci_exynos_set_clksel_timing(struct dw_mci *host, u32 timing) set_bit(DW_MMC_CARD_NO_USE_HOLD, &host->cur_slot->flags); } -#ifdef CONFIG_PM_SLEEP -static int dw_mci_exynos_suspend(struct device *dev) -{ - struct dw_mci *host = dev_get_drvdata(dev); - - return dw_mci_suspend(host); -} - -static int dw_mci_exynos_resume(struct device *dev) +#ifdef CONFIG_PM +static int dw_mci_exynos_runtime_resume(struct device *dev) { struct dw_mci *host = dev_get_drvdata(dev); dw_mci_exynos_config_smu(host); - return dw_mci_resume(host); + return dw_mci_runtime_resume(dev); } /** @@ -211,10 +205,8 @@ static int dw_mci_exynos_resume_noirq(struct device *dev) return 0; } #else -#define dw_mci_exynos_suspend NULL -#define dw_mci_exynos_resume NULL #define dw_mci_exynos_resume_noirq NULL -#endif /* CONFIG_PM_SLEEP */ +#endif /* CONFIG_PM */ static void dw_mci_exynos_config_hs400(struct dw_mci *host, u32 timing) { @@ -531,7 +523,11 @@ static int dw_mci_exynos_probe(struct platform_device *pdev) } static const struct dev_pm_ops dw_mci_exynos_pmops = { - SET_SYSTEM_SLEEP_PM_OPS(dw_mci_exynos_suspend, dw_mci_exynos_resume) + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) + SET_RUNTIME_PM_OPS(dw_mci_runtime_suspend, + dw_mci_exynos_runtime_resume, + NULL) .resume_noirq = dw_mci_exynos_resume_noirq, .thaw_noirq = dw_mci_exynos_resume_noirq, .restore_noirq = dw_mci_exynos_resume_noirq,