From patchwork Mon Mar 20 17:50:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 9634955 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4B0F3602D6 for ; Mon, 20 Mar 2017 18:17:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4152B205AD for ; Mon, 20 Mar 2017 18:17:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 310D826D05; Mon, 20 Mar 2017 18:17:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B3F8A205AD for ; Mon, 20 Mar 2017 18:17:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754844AbdCTSRa (ORCPT ); Mon, 20 Mar 2017 14:17:30 -0400 Received: from mga01.intel.com ([192.55.52.88]:11845 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755699AbdCTSAJ (ORCPT ); Mon, 20 Mar 2017 14:00:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1490032808; x=1521568808; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=NZefoso/UCJcQpR99uVyWW4h/V1DQFtYTZLH20g/VBw=; b=OP1T9z4tER5KoKSuMkvdIOp2jIoruHThwBKG7GB2+fdnJPKYr8OEYFqw V+nrDuSmWz07eyXR8J3lwX5zl0w6iQ==; Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Mar 2017 10:56:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,195,1486454400"; d="scan'208";a="1124975103" Received: from ahunter-desktop.fi.intel.com ([10.237.72.168]) by fmsmga001.fm.intel.com with ESMTP; 20 Mar 2017 10:56:34 -0700 From: Adrian Hunter To: Ulf Hansson Cc: linux-mmc , Al Cooper , Jaedon Shin , Haibo Chen , Dong Aisheng , Shawn Lin , Douglas Anderson , Zach Brown , Ludovic Desroches , Jisheng Zhang , Yangbo Lu , Jaehoon Chung , Weijun Yang , Barry Song , Peter Griffin , Lee Jones , Jon Hunter , Harjani Ritesh Subject: [PATCH 02/25] mmc: sdhci-pci: Do not disable interrupts in sdhci_intel_set_power Date: Mon, 20 Mar 2017 19:50:30 +0200 Message-Id: <1490032253-6030-3-git-send-email-adrian.hunter@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1490032253-6030-1-git-send-email-adrian.hunter@intel.com> References: <1490032253-6030-1-git-send-email-adrian.hunter@intel.com> Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Disabling interrupts for even a millisecond can cause problems for some devices. That can happen when Intel host controllers wait for the present state to propagate. The spin lock is not necessary here. Anything that is racing with changes to the I/O state is already broken. The mmc core already provides synchronization via "claiming" the host. Although the spin lock probably should be removed from the code paths that lead to this point, such a patch would touch too much code to be suitable for stable trees. Consequently, for this patch, just drop the spin lock while waiting. Signed-off-by: Adrian Hunter Cc: stable@vger.kernel.org # v4.9+ --- drivers/mmc/host/sdhci-pci-core.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c index 982b3e349426..86560d590786 100644 --- a/drivers/mmc/host/sdhci-pci-core.c +++ b/drivers/mmc/host/sdhci-pci-core.c @@ -451,6 +451,8 @@ static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode, if (mode == MMC_POWER_OFF) return; + spin_unlock_irq(&host->lock); + /* * Bus power might not enable after D3 -> D0 transition due to the * present state not yet having propagated. Retry for up to 2ms. @@ -463,6 +465,8 @@ static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode, reg |= SDHCI_POWER_ON; sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); } + + spin_lock_irq(&host->lock); } static const struct sdhci_ops sdhci_intel_byt_ops = {