diff mbox

[v2] mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling

Message ID 1502763407-49116-1-git-send-email-yangbo.lu@nxp.com (mailing list archive)
State New, archived
Headers show

Commit Message

Yangbo Lu Aug. 15, 2017, 2:16 a.m. UTC
SD controller with SDHCI_QUIRK_NO_HISPD_BIT quirk probably
use high speed enable bit for other purpose. So this bit
shouldn't be changed for high speed enabling for this type of
SD controller.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
---
Changes for v2:
	- Removed duplicate perenthesis.
	- Added "Acked-by: Adrian Hunter".
---
 drivers/mmc/host/sdhci.c | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

Comments

Ulf Hansson Aug. 22, 2017, 11:14 a.m. UTC | #1
On 15 August 2017 at 04:16, Yangbo Lu <yangbo.lu@nxp.com> wrote:
> SD controller with SDHCI_QUIRK_NO_HISPD_BIT quirk probably
> use high speed enable bit for other purpose. So this bit
> shouldn't be changed for high speed enabling for this type of
> SD controller.
>
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> Acked-by: Adrian Hunter <adrian.hunter@intel.com>

Thanks, applied for next!

Kind regards
Uffe

> ---
> Changes for v2:
>         - Removed duplicate perenthesis.
>         - Added "Acked-by: Adrian Hunter".
> ---
>  drivers/mmc/host/sdhci.c | 27 ++++++++++++++-------------
>  1 file changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index a1ad2dd..315bded 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1641,19 +1641,20 @@ void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
>
>         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
>
> -       if ((ios->timing == MMC_TIMING_SD_HS ||
> -            ios->timing == MMC_TIMING_MMC_HS ||
> -            ios->timing == MMC_TIMING_MMC_HS400 ||
> -            ios->timing == MMC_TIMING_MMC_HS200 ||
> -            ios->timing == MMC_TIMING_MMC_DDR52 ||
> -            ios->timing == MMC_TIMING_UHS_SDR50 ||
> -            ios->timing == MMC_TIMING_UHS_SDR104 ||
> -            ios->timing == MMC_TIMING_UHS_DDR50 ||
> -            ios->timing == MMC_TIMING_UHS_SDR25)
> -           && !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT))
> -               ctrl |= SDHCI_CTRL_HISPD;
> -       else
> -               ctrl &= ~SDHCI_CTRL_HISPD;
> +       if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) {
> +               if (ios->timing == MMC_TIMING_SD_HS ||
> +                    ios->timing == MMC_TIMING_MMC_HS ||
> +                    ios->timing == MMC_TIMING_MMC_HS400 ||
> +                    ios->timing == MMC_TIMING_MMC_HS200 ||
> +                    ios->timing == MMC_TIMING_MMC_DDR52 ||
> +                    ios->timing == MMC_TIMING_UHS_SDR50 ||
> +                    ios->timing == MMC_TIMING_UHS_SDR104 ||
> +                    ios->timing == MMC_TIMING_UHS_DDR50 ||
> +                    ios->timing == MMC_TIMING_UHS_SDR25)
> +                       ctrl |= SDHCI_CTRL_HISPD;
> +               else
> +                       ctrl &= ~SDHCI_CTRL_HISPD;
> +       }
>
>         if (host->version >= SDHCI_SPEC_300) {
>                 u16 clk, ctrl_2;
> --
> 2.1.0.27.g96db324
>
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diff mbox

Patch

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index a1ad2dd..315bded 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1641,19 +1641,20 @@  void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 
 	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 
-	if ((ios->timing == MMC_TIMING_SD_HS ||
-	     ios->timing == MMC_TIMING_MMC_HS ||
-	     ios->timing == MMC_TIMING_MMC_HS400 ||
-	     ios->timing == MMC_TIMING_MMC_HS200 ||
-	     ios->timing == MMC_TIMING_MMC_DDR52 ||
-	     ios->timing == MMC_TIMING_UHS_SDR50 ||
-	     ios->timing == MMC_TIMING_UHS_SDR104 ||
-	     ios->timing == MMC_TIMING_UHS_DDR50 ||
-	     ios->timing == MMC_TIMING_UHS_SDR25)
-	    && !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT))
-		ctrl |= SDHCI_CTRL_HISPD;
-	else
-		ctrl &= ~SDHCI_CTRL_HISPD;
+	if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) {
+		if (ios->timing == MMC_TIMING_SD_HS ||
+		     ios->timing == MMC_TIMING_MMC_HS ||
+		     ios->timing == MMC_TIMING_MMC_HS400 ||
+		     ios->timing == MMC_TIMING_MMC_HS200 ||
+		     ios->timing == MMC_TIMING_MMC_DDR52 ||
+		     ios->timing == MMC_TIMING_UHS_SDR50 ||
+		     ios->timing == MMC_TIMING_UHS_SDR104 ||
+		     ios->timing == MMC_TIMING_UHS_DDR50 ||
+		     ios->timing == MMC_TIMING_UHS_SDR25)
+			ctrl |= SDHCI_CTRL_HISPD;
+		else
+			ctrl &= ~SDHCI_CTRL_HISPD;
+	}
 
 	if (host->version >= SDHCI_SPEC_300) {
 		u16 clk, ctrl_2;