From patchwork Thu Jan 18 14:34:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 10173413 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 98BB0603B5 for ; Thu, 18 Jan 2018 14:39:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 66B0827F4B for ; Thu, 18 Jan 2018 14:39:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5948928174; Thu, 18 Jan 2018 14:39:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0101C27F4B for ; Thu, 18 Jan 2018 14:39:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756614AbeAROgG (ORCPT ); Thu, 18 Jan 2018 09:36:06 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:9775 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756574AbeAROgD (ORCPT ); Thu, 18 Jan 2018 09:36:03 -0500 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w0IEY961021771; Thu, 18 Jan 2018 15:34:53 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2fgygdmw99-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 18 Jan 2018 15:34:53 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 307EE31; Thu, 18 Jan 2018 14:34:53 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0E2DC2646; Thu, 18 Jan 2018 14:34:53 +0000 (GMT) Received: from localhost (10.75.127.46) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 18 Jan 2018 15:34:52 +0100 From: To: Russell King , Ulf Hansson , Michael Turquette , Stephen Boyd , Linus Walleij , Rob Herring , Mark Rutland , Alexandre Torgue CC: , , , , , , Patrice Chotard Subject: [PATCH v3 03/14] mmc: mmci: Don't pretend all variants to have OPENDRAIN bit Date: Thu, 18 Jan 2018 15:34:19 +0100 Message-ID: <1516286070-24927-4-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516286070-24927-1-git-send-email-patrice.chotard@st.com> References: <1516286070-24927-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG8NODE2.st.com (10.75.127.23) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-01-18_07:, , signatures=0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Patrice Chotard This patch prepares for supporting STM32 variant which doesn't have opendrain bit in MMCIPOWER register. ST others variant (u300, nomadik and ux500) uses MCI_OD bit whereas others variants uses MCI_ROD bit. Signed-off-by: Patrice Chotard --- v3: _ use variant->opendrain instead of host->variant->opendrain _ remove comment about OD and ROD bit v2: _ Replace opendrain bool type by u32 _ Clean opendrain bit management code drivers/mmc/host/mmci.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 8a4fbc2..f0edfe7 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -85,6 +85,7 @@ * @mmcimask1: true if variant have a MMCIMASK1 register. * @start_err: bitmask identifying the STARTBITERR bit inside MMCISTATUS * register. + * @opendrain: bitmask identifying the OPENDRAIN bit inside MMCIPOWER register */ struct variant_data { unsigned int clkreg; @@ -116,6 +117,7 @@ struct variant_data { bool reversed_irq_handling; bool mmcimask1; u32 start_err; + u32 opendrain; }; static struct variant_data variant_arm = { @@ -127,6 +129,7 @@ struct variant_data { .reversed_irq_handling = true, .mmcimask1 = true, .start_err = MCI_STARTBITERR, + .opendrain = MCI_ROD, }; static struct variant_data variant_arm_extended_fifo = { @@ -137,6 +140,7 @@ struct variant_data { .f_max = 100000000, .mmcimask1 = true, .start_err = MCI_STARTBITERR, + .opendrain = MCI_ROD, }; static struct variant_data variant_arm_extended_fifo_hwfc = { @@ -148,6 +152,7 @@ struct variant_data { .f_max = 100000000, .mmcimask1 = true, .start_err = MCI_STARTBITERR, + .opendrain = MCI_ROD, }; static struct variant_data variant_u300 = { @@ -165,6 +170,7 @@ struct variant_data { .pwrreg_nopower = true, .mmcimask1 = true, .start_err = MCI_STARTBITERR, + .opendrain = MCI_OD, }; static struct variant_data variant_nomadik = { @@ -183,6 +189,7 @@ struct variant_data { .pwrreg_nopower = true, .mmcimask1 = true, .start_err = MCI_STARTBITERR, + .opendrain = MCI_OD, }; static struct variant_data variant_ux500 = { @@ -207,6 +214,7 @@ struct variant_data { .pwrreg_nopower = true, .mmcimask1 = true, .start_err = MCI_STARTBITERR, + .opendrain = MCI_OD, }; static struct variant_data variant_ux500v2 = { @@ -233,6 +241,7 @@ struct variant_data { .pwrreg_nopower = true, .mmcimask1 = true, .start_err = MCI_STARTBITERR, + .opendrain = MCI_OD, }; static struct variant_data variant_qcom = { @@ -253,6 +262,7 @@ struct variant_data { .qcom_dml = true, .mmcimask1 = true, .start_err = MCI_STARTBITERR, + .opendrain = MCI_ROD, }; /* Busy detection for the ST Micro variant */ @@ -1455,17 +1465,8 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ~MCI_ST_DATA2DIREN); } - if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) { - if (host->hw_designer != AMBA_VENDOR_ST) - pwr |= MCI_ROD; - else { - /* - * The ST Micro variant use the ROD bit for something - * else and only has OD (Open Drain). - */ - pwr |= MCI_OD; - } - } + if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN && variant->opendrain) + pwr |= variant->opendrain; /* * If clock = 0 and the variant requires the MMCIPOWER to be used for