From patchwork Thu Mar 8 01:01:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 10265727 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 936406055B for ; Thu, 8 Mar 2018 01:02:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8567328E1A for ; Thu, 8 Mar 2018 01:02:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 79B8929198; Thu, 8 Mar 2018 01:02:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EDCA928E1A for ; Thu, 8 Mar 2018 01:02:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754946AbeCHBCs (ORCPT ); Wed, 7 Mar 2018 20:02:48 -0500 Received: from mail-pf0-f193.google.com ([209.85.192.193]:45563 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754963AbeCHBCr (ORCPT ); Wed, 7 Mar 2018 20:02:47 -0500 Received: by mail-pf0-f193.google.com with SMTP id h19so1672680pfd.12 for ; Wed, 07 Mar 2018 17:02:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BaQpGtQ9A+jYcLhaNDpr0FaAMTTP4fInrxCsJEaSh5c=; b=GMZ8nAplNICyuCvLbVrpux0PUFmx6nirRa0AS/weD5ZIcqtmYnXFHsDbYM7qOZ67+Y BtEEfl/+84WOlHLNxOfdy8zOCCEg3cru8gCyeQqlSUAGL5eCewdVU6CGu8pkdqvKDyPJ FSdjefmXN4m7Yr82RgxIuno1+QOWGUWBP91B0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BaQpGtQ9A+jYcLhaNDpr0FaAMTTP4fInrxCsJEaSh5c=; b=Yp/denL+b2bVikaFiKPtrpeSFvs6PlCz324mnzIyzy1o53kldDHjzBW0jyt6nJZDE7 r+iZTFY4YkD61pPE7C32cCk09RXUm1JeKEbU1I1gMlzRzI/2THRB4gQs5Ipqy6iZaswS 0AtCW+hH1cN0lAzha7MCxmAfrxoh8hhqxppetWVifd6HG1322PLN6WdVX0Fz14qq0Tsj dbc5za9YaguZStFXEOFr2Ths2xM30KTU/qgeFpMjI4B9orkRCAr6EyfgVQt4lSwUkdr3 ywJ3CCnsaYn60EayBFcL56ym6aDk0ghaFclgcn5CY2K1WNDwc3CtK8As/NA62rlxfI2l wsHg== X-Gm-Message-State: APf1xPD9nPwOqK2yhCP7Ladhl0MeZaCO4ghhcLQVPOaUkSz5pR1HBYd7 iaoOinDh7A5vEylnCfSH9WUMNg== X-Google-Smtp-Source: AG47ELuX/Wca7UYB562U8RvdS7R6hDHG5l8meOjib5sIluIZqa76X2z962/cNmqJjgQToGmI0GhFig== X-Received: by 10.99.96.18 with SMTP id u18mr20184923pgb.124.1520470966940; Wed, 07 Mar 2018 17:02:46 -0800 (PST) Received: from localhost.localdomain ([104.237.91.63]) by smtp.gmail.com with ESMTPSA id l12sm39459131pfb.35.2018.03.07.17.02.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 07 Mar 2018 17:02:45 -0800 (PST) From: Shawn Guo To: Ulf Hansson Cc: Jaehoon Chung , Shawn Lin , Rob Herring , tianshuliang , Jiancheng Xue , devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, Shawn Guo Subject: [PATCH v3 1/2] dt-bindings: mmc: add bindings for hi3798cv200-dw-mshc Date: Thu, 8 Mar 2018 09:01:33 +0800 Message-Id: <1520470894-9114-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1520470894-9114-1-git-send-email-shawn.guo@linaro.org> References: <1520470894-9114-1-git-send-email-shawn.guo@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: tianshuliang Hisilicon hi3798cv200 SoC extends the dw-mshc controller for additional clock control. Add device tree bindings for hi3798cv200-dw-mshc. Signed-off-by: tianshuliang Signed-off-by: Jiancheng Xue Signed-off-by: Shawn Guo Reviewed-by: Rob Herring --- .../bindings/mmc/hi3798cv200-dw-mshc.txt | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt diff --git a/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt new file mode 100644 index 000000000000..a0693b7145f2 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt @@ -0,0 +1,40 @@ +* Hisilicon Hi3798CV200 specific extensions to the Synopsys Designware Mobile + Storage Host Controller + +Read synopsys-dw-mshc.txt for more details + +The Synopsys designware mobile storage host controller is used to interface +a SoC with storage medium such as eMMC or SD/MMC cards. This file documents +differences between the core Synopsys dw mshc controller properties described +by synopsys-dw-mshc.txt and the properties used by the Hisilicon Hi3798CV200 +specific extensions to the Synopsys Designware Mobile Storage Host Controller. + +Required Properties: +- compatible: Should contain "hisilicon,hi3798cv200-dw-mshc". +- clocks: A list of phandle + clock-specifier pairs for the clocks listed + in clock-names. +- clock-names: Should contain the following: + "ciu" - The ciu clock described in synopsys-dw-mshc.txt. + "biu" - The biu clock described in synopsys-dw-mshc.txt. + "ciu-sample" - Hi3798CV200 extended phase clock for ciu sampling. + "ciu-drive" - Hi3798CV200 extended phase clock for ciu driving. + +Example: + + emmc: mmc@9830000 { + compatible = "hisilicon,hi3798cv200-dw-mshc"; + reg = <0x9830000 0x10000>; + interrupts = ; + clocks = <&crg HISTB_MMC_CIU_CLK>, + <&crg HISTB_MMC_BIU_CLK>, + <&crg HISTB_MMC_SAMPLE_CLK>, + <&crg HISTB_MMC_DRV_CLK>; + clock-names = "ciu", "biu", "ciu-sample", "ciu-drive"; + fifo-depth = <256>; + clock-frequency = <200000000>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + bus-width = <8>; + };