From patchwork Wed Jan 2 19:36:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 10746651 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7421614E2 for ; Wed, 2 Jan 2019 19:36:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6263D2793B for ; Wed, 2 Jan 2019 19:36:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5695A27E01; Wed, 2 Jan 2019 19:36:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 78F542793B for ; Wed, 2 Jan 2019 19:36:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729704AbfABTgx (ORCPT ); Wed, 2 Jan 2019 14:36:53 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:10045 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729680AbfABTgw (ORCPT ); Wed, 2 Jan 2019 14:36:52 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 02 Jan 2019 11:36:41 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Wed, 02 Jan 2019 11:36:52 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Wed, 02 Jan 2019 11:36:52 -0800 Received: from HQMAIL108.nvidia.com (172.18.146.13) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 2 Jan 2019 19:36:51 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Wed, 2 Jan 2019 19:36:51 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.110.103.52]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Wed, 02 Jan 2019 11:36:51 -0800 From: Sowjanya Komatineni To: , CC: , , , , , Sowjanya Komatineni Subject: [PATCH V7 1/2] arm64: dtsi: Fix SDMMC address range Date: Wed, 2 Jan 2019 11:36:47 -0800 Message-ID: <1546457808-18270-2-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1546457808-18270-1-git-send-email-skomatineni@nvidia.com> References: <1546457808-18270-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1546457801; bh=CFBtF6ZaKNyqKgjWa+hPoclDVuRehYmyqcZmFtTTkGs=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=EKyq3FQV0+EihYXuQs0JNZbNNFen40c+IiaECfmFFv7OlJ01YZKCCKFR1Qn0ZxM2j rAkaYg8PLUf0hR8EwdHLYMtpw4qqprfqWgekWJbLdlH4JxkMNOarbMTDZ+sf6asjwo aKYlvd3t2VTMZun5yb0+DlWZofjrcuHUif66G0pwl9mqoP5lXrN7QE7RCjoQ8UxKJC ztla0regIz5WFSidf7LJtx0UxRxE8kG+dfkpX3J2e2GSu5aCXrOJNDZFy5SWqWWLd2 pnzZoeQIG3tMcFNoOfjmm/i5B43Gn1eFmNOxjaf27D6OBLBeUvqVrtTpnQX8OVvIYy YJ5o4Ai41Bg+g== Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch fixes the SDMMC Controllers address space to be exact defined register address range as per the design. SDMMC Controller supporting Command Queue has CQHCI registers at offset 0xF000. This fix helps to identify the Tegra SDMMC Controllers supporting Command Queue based on the size of address space. Signed-off-by: Sowjanya Komatineni --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 6 +++--- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 2f3c8e29520d..6fda3d6a7f3d 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -231,7 +231,7 @@ sdmmc1: sdhci@3400000 { compatible = "nvidia,tegra186-sdhci"; - reg = <0x0 0x03400000 0x0 0x10000>; + reg = <0x0 0x03400000 0x0 0x220>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_SDMMC1>; clock-names = "sdhci"; @@ -256,7 +256,7 @@ sdmmc2: sdhci@3420000 { compatible = "nvidia,tegra186-sdhci"; - reg = <0x0 0x03420000 0x0 0x10000>; + reg = <0x0 0x03420000 0x0 0x220>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_SDMMC2>; clock-names = "sdhci"; @@ -276,7 +276,7 @@ sdmmc3: sdhci@3440000 { compatible = "nvidia,tegra186-sdhci"; - reg = <0x0 0x03440000 0x0 0x10000>; + reg = <0x0 0x03440000 0x0 0x220>; interrupts = ; clocks = <&bpmp TEGRA186_CLK_SDMMC3>; clock-names = "sdhci"; diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index c2091bb16546..6510ef6492b1 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -295,7 +295,7 @@ sdmmc1: sdhci@3400000 { compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci"; - reg = <0x03400000 0x10000>; + reg = <0x03400000 0x220>; interrupts = ; clocks = <&bpmp TEGRA194_CLK_SDMMC1>; clock-names = "sdhci"; @@ -306,7 +306,7 @@ sdmmc3: sdhci@3440000 { compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci"; - reg = <0x03440000 0x10000>; + reg = <0x03440000 0x220>; interrupts = ; clocks = <&bpmp TEGRA194_CLK_SDMMC3>; clock-names = "sdhci";