From patchwork Wed Feb 13 09:06:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chaotian Jing X-Patchwork-Id: 10809397 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 83E8213B5 for ; Wed, 13 Feb 2019 09:07:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 71C5E2B0E5 for ; Wed, 13 Feb 2019 09:07:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 653EF2C204; Wed, 13 Feb 2019 09:07:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 022142B0E5 for ; Wed, 13 Feb 2019 09:07:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732453AbfBMJHH (ORCPT ); Wed, 13 Feb 2019 04:07:07 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:5247 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727954AbfBMJHH (ORCPT ); Wed, 13 Feb 2019 04:07:07 -0500 X-UUID: 7bcd46a362e948fb83ece4cec05995db-20190213 X-UUID: 7bcd46a362e948fb83ece4cec05995db-20190213 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 2061458422; Wed, 13 Feb 2019 17:06:59 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 13 Feb 2019 17:06:56 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 13 Feb 2019 17:06:56 +0800 From: Chaotian Jing To: Ulf Hansson CC: Matthias Brugger , Shawn Lin , Simon Horman , Chaotian Jing , Kyle Roeschley , Hongjie Fang , Harish Jenny K N , , , , , , Adrian Hunter Subject: [PATCH v1] mmc: mmc: Fix HS setting in mmc_hs400_to_hs200() Date: Wed, 13 Feb 2019 17:06:52 +0800 Message-ID: <1550048812-29068-1-git-send-email-chaotian.jing@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 X-TM-SNTS-SMTP: 68645DB28F340A99640835A4B7B41D19430DCE141EC0F639AD3442A3CDA9D7072000:8 X-MTK: N Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP mmc_hs400_to_hs200() begins with the card and host in HS400 mode. Therefore, any commands sent to the card should use HS400 timing. reduce clock frequency to 50Mhz but without host timming change may cause CMD6 response CRC error. because host still running at hs400 mode, and it's hard to find a suitable setting for all eMMC cards when clock frequency reduced to 50Mhz but card & host still in hs400 mode. this patch refers to mmc_select_hs400(), make the reduce clock frequency after card timing change. Signed-off-by: Chaotian Jing Fixes: ef3d232245ab ("mmc: mmc: Relax checking for switch errors after HS200 switch") --- drivers/mmc/core/mmc.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 09c688f..00adc2d 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -1239,20 +1239,37 @@ int mmc_hs400_to_hs200(struct mmc_card *card) int err; u8 val; - /* Reduce frequency to HS */ - max_dtr = card->ext_csd.hs_max_dtr; - mmc_set_clock(host, max_dtr); - /* Switch HS400 to HS DDR */ val = EXT_CSD_TIMING_HS; err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, val, card->ext_csd.generic_cmd6_time, 0, true, false, true); - if (err) - goto out_err; + /* + * as we are on the way to do re-tune, so if the CMD6 got response CRC + * error, do not treat it as error. + */ + if (err) { + if (err == -EILSEQ) { + /* + * card will busy after sending out response and host + * driver may not wait busy de-assert when get + * response CRC error. so just wait enough time to + * ensure card leave busy state. + */ + mmc_delay(card->ext_csd.generic_cmd6_time); + pr_debug("%s: %s switch to HS got CRC error\n", + mmc_hostname(host), __func__); + } else { + goto out_err; + } + } mmc_set_timing(host, MMC_TIMING_MMC_DDR52); + /* Reduce frequency to HS */ + max_dtr = card->ext_csd.hs_max_dtr; + mmc_set_clock(host, max_dtr); + err = mmc_switch_status(card); if (err) goto out_err;