| Message ID | 1569307744-42479-1-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | mmc: renesas_sdhi_internal_dmac: Add r8a774b1 support | expand |
Hi Biju, On Tue, Sep 24, 2019 at 8:49 AM Biju Das <biju.das@bp.renesas.com> wrote: > This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > --- > drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > index 751fe91..7c6020e 100644 > --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > @@ -308,6 +308,7 @@ static const struct soc_device_attribute soc_whitelist[] = { > .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, > /* generic ones */ > { .soc_id = "r8a774a1" }, > + { .soc_id = "r8a774b1" }, > { .soc_id = "r8a774c0" }, > { .soc_id = "r8a77470" }, > { .soc_id = "r8a7795" }, Is this sufficient? Do you need a tuning quirk entry in sdhi_quirks_match[]? Gr{oetje,eeting}s, Geert
Hi Geert, Thanks for the feedback. > Subject: Re: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > support > > Hi Biju, > > On Tue, Sep 24, 2019 at 8:49 AM Biju Das <biju.das@bp.renesas.com> wrote: > > This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > --- > > drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > index 751fe91..7c6020e 100644 > > --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > @@ -308,6 +308,7 @@ static const struct soc_device_attribute > soc_whitelist[] = { > > .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, > > /* generic ones */ > > { .soc_id = "r8a774a1" }, > > + { .soc_id = "r8a774b1" }, > > { .soc_id = "r8a774c0" }, > > { .soc_id = "r8a77470" }, > > { .soc_id = "r8a7795" }, > > Is this sufficient? > Do you need a tuning quirk entry in sdhi_quirks_match[]? Do you mean the "quirks->manual_calibration" as mentioned in the below patch ? https://patchwork.kernel.org/patch/11024131/ regards, Biju
Hi Biju, On Thu, Sep 26, 2019 at 5:11 PM Biju Das <biju.das@bp.renesas.com> wrote: > > Subject: Re: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 support > > On Tue, Sep 24, 2019 at 8:49 AM Biju Das <biju.das@bp.renesas.com> wrote: > > > This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. > > > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > > --- > > > drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > index 751fe91..7c6020e 100644 > > > --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > @@ -308,6 +308,7 @@ static const struct soc_device_attribute > > soc_whitelist[] = { > > > .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, > > > /* generic ones */ > > > { .soc_id = "r8a774a1" }, > > > + { .soc_id = "r8a774b1" }, > > > { .soc_id = "r8a774c0" }, > > > { .soc_id = "r8a77470" }, > > > { .soc_id = "r8a7795" }, > > > > Is this sufficient? > > Do you need a tuning quirk entry in sdhi_quirks_match[]? > > Do you mean the "quirks->manual_calibration" as mentioned in the below patch ? > > https://patchwork.kernel.org/patch/11024131/ Exactly. Is RZ/G2N affected? Gr{oetje,eeting}s, Geert
Hi Geert, Thanks for the feedback. > Subject: Re: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > support > > Hi Biju, > > On Thu, Sep 26, 2019 at 5:11 PM Biju Das <biju.das@bp.renesas.com> wrote: > > > Subject: Re: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > > > support On Tue, Sep 24, 2019 at 8:49 AM Biju Das > <biju.das@bp.renesas.com> wrote: > > > > This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. > > > > > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > > > --- > > > > drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 + > > > > 1 file changed, 1 insertion(+) > > > > > > > > diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > index 751fe91..7c6020e 100644 > > > > --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > @@ -308,6 +308,7 @@ static const struct soc_device_attribute > > > soc_whitelist[] = { > > > > .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, > > > > /* generic ones */ > > > > { .soc_id = "r8a774a1" }, > > > > + { .soc_id = "r8a774b1" }, > > > > { .soc_id = "r8a774c0" }, > > > > { .soc_id = "r8a77470" }, > > > > { .soc_id = "r8a7795" }, > > > > > > Is this sufficient? > > > Do you need a tuning quirk entry in sdhi_quirks_match[]? > > > > Do you mean the "quirks->manual_calibration" as mentioned in the below > patch ? > > > > https://patchwork.kernel.org/patch/11024131/ > > Exactly. Is RZ/G2N affected? No. RZ/G2N is not affected. I have enabled HS400 mode on RZ/G2N board and without this patch it works fine. Note:- I also tested with quirk entry added in sdhi_quirks_match. That is also works fine. Regards, Biju
> > Exactly. Is RZ/G2N affected? > > No. RZ/G2N is not affected. I have enabled HS400 mode on RZ/G2N board and without this patch it works fine. > > Note:- > I also tested with quirk entry added in sdhi_quirks_match. That is also works fine. You can't really test if this is needed or not. You need confirmation from the HW team. This is also why the patch is not upstream yet because there is still more on-going investigation for the HW teams.
Hi Geert and Wolfram, Are you happy with this patch? Please let me know. Regards, Biju > Subject: RE: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > support > > Hi Geert, > > Thanks for the feedback. > > > Subject: Re: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > > support > > > > Hi Biju, > > > > On Thu, Sep 26, 2019 at 5:11 PM Biju Das <biju.das@bp.renesas.com> > wrote: > > > > Subject: Re: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > > > > support On Tue, Sep 24, 2019 at 8:49 AM Biju Das > > <biju.das@bp.renesas.com> wrote: > > > > > This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. > > > > > > > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > > > > --- > > > > > drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 + > > > > > 1 file changed, 1 insertion(+) > > > > > > > > > > diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > > b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > > index 751fe91..7c6020e 100644 > > > > > --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > > +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > > @@ -308,6 +308,7 @@ static const struct soc_device_attribute > > > > soc_whitelist[] = { > > > > > .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, > > > > > /* generic ones */ > > > > > { .soc_id = "r8a774a1" }, > > > > > + { .soc_id = "r8a774b1" }, > > > > > { .soc_id = "r8a774c0" }, > > > > > { .soc_id = "r8a77470" }, > > > > > { .soc_id = "r8a7795" }, > > > > > > > > Is this sufficient? > > > > Do you need a tuning quirk entry in sdhi_quirks_match[]? > > > > > > Do you mean the "quirks->manual_calibration" as mentioned in the > > > below > > patch ? > > > > > > https://patchwork.kernel.org/patch/11024131/ > > > > Exactly. Is RZ/G2N affected? > > No. RZ/G2N is not affected. I have enabled HS400 mode on RZ/G2N board > and without this patch it works fine. > > Note:- > I also tested with quirk entry added in sdhi_quirks_match. That is also works > fine. > > Regards, > Biju
Hi Wolfram, Gentle remainder. This patch is for whitelisting r8a774b1 SoC and there by supporting the same. Are you happy with this patch? Regards, Biju > Subject: RE: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > support > > > Hi Geert and Wolfram, > > Are you happy with this patch? Please let me know. > > Regards, > Biju > > > Subject: RE: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > > support > > > > Hi Geert, > > > > Thanks for the feedback. > > > > > Subject: Re: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > > > support > > > > > > Hi Biju, > > > > > > On Thu, Sep 26, 2019 at 5:11 PM Biju Das <biju.das@bp.renesas.com> > > wrote: > > > > > Subject: Re: [PATCH] mmc: renesas_sdhi_internal_dmac: Add > > > > > r8a774b1 support On Tue, Sep 24, 2019 at 8:49 AM Biju Das > > > <biju.das@bp.renesas.com> wrote: > > > > > > This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. > > > > > > > > > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > > > > > --- > > > > > > drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 + > > > > > > 1 file changed, 1 insertion(+) > > > > > > > > > > > > diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > > > b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > > > index 751fe91..7c6020e 100644 > > > > > > --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > > > +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > > > > > > @@ -308,6 +308,7 @@ static const struct soc_device_attribute > > > > > soc_whitelist[] = { > > > > > > .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, > > > > > > /* generic ones */ > > > > > > { .soc_id = "r8a774a1" }, > > > > > > + { .soc_id = "r8a774b1" }, > > > > > > { .soc_id = "r8a774c0" }, > > > > > > { .soc_id = "r8a77470" }, > > > > > > { .soc_id = "r8a7795" }, > > > > > > > > > > Is this sufficient? > > > > > Do you need a tuning quirk entry in sdhi_quirks_match[]? > > > > > > > > Do you mean the "quirks->manual_calibration" as mentioned in the > > > > below > > > patch ? > > > > > > > > https://patchwork.kernel.org/patch/11024131/ > > > > > > Exactly. Is RZ/G2N affected? > > > > No. RZ/G2N is not affected. I have enabled HS400 mode on RZ/G2N board > > and without this patch it works fine. > > > > Note:- > > I also tested with quirk entry added in sdhi_quirks_match. That is > > also works fine. > > > > Regards, > > Biju
On Tue, Sep 24, 2019 at 07:49:04AM +0100, Biju Das wrote: > This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> But please keep an eye on the patch which Geert mentioned and check with your HW team if your SoC needs this, too. (You can't really test that without a very specific setup)
Hi Wolfram, Thanks for the feedback. > Subject: Re: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > support > > On Tue, Sep 24, 2019 at 07:49:04AM +0100, Biju Das wrote: > > This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > > But please keep an eye on the patch which Geert mentioned and check with > your HW team if your SoC needs this, too. (You can't really test that without a > very specific setup) Yes, I will keep an eye on the patch mentioned by Geert and will check the same with HW team. Regards, Biju
Hi Ulf Hansson, Gentle reminder. Are you happy with the below patch? Regards, Biju > -----Original Message----- > From: Wolfram Sang <wsa@the-dreams.de> > Sent: Wednesday, October 23, 2019 4:16 PM > To: Biju Das <biju.das@bp.renesas.com> > Cc: Ulf Hansson <ulf.hansson@linaro.org>; Wolfram Sang > <wsa+renesas@sang-engineering.com>; linux-mmc@vger.kernel.org; Geert > Uytterhoeven <geert+renesas@glider.be>; Simon Horman > <horms@verge.net.au>; Chris Paterson <Chris.Paterson2@renesas.com>; > Fabrizio Castro <fabrizio.castro@bp.renesas.com>; linux-renesas- > soc@vger.kernel.org > Subject: Re: [PATCH] mmc: renesas_sdhi_internal_dmac: Add r8a774b1 > support > > On Tue, Sep 24, 2019 at 07:49:04AM +0100, Biju Das wrote: > > This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > > But please keep an eye on the patch which Geert mentioned and check with > your HW team if your SoC needs this, too. (You can't really test that without a > very specific setup)
On Tue, 24 Sep 2019 at 08:49, Biju Das <biju.das@bp.renesas.com> wrote: > > This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Applied for next, thanks! Kind regards Uffe > --- > drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > index 751fe91..7c6020e 100644 > --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c > +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c > @@ -308,6 +308,7 @@ static const struct soc_device_attribute soc_whitelist[] = { > .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, > /* generic ones */ > { .soc_id = "r8a774a1" }, > + { .soc_id = "r8a774b1" }, > { .soc_id = "r8a774c0" }, > { .soc_id = "r8a77470" }, > { .soc_id = "r8a7795" }, > -- > 2.7.4 >
diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c index 751fe91..7c6020e 100644 --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c @@ -308,6 +308,7 @@ static const struct soc_device_attribute soc_whitelist[] = { .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, /* generic ones */ { .soc_id = "r8a774a1" }, + { .soc_id = "r8a774b1" }, { .soc_id = "r8a774c0" }, { .soc_id = "r8a77470" }, { .soc_id = "r8a7795" },
This patch adds SDHI support for RZ/G2N (R8A774B1) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 + 1 file changed, 1 insertion(+)